WO2003088019A2 - Microcode patch authentication - Google Patents
Microcode patch authentication Download PDFInfo
- Publication number
- WO2003088019A2 WO2003088019A2 PCT/US2003/009640 US0309640W WO03088019A2 WO 2003088019 A2 WO2003088019 A2 WO 2003088019A2 US 0309640 W US0309640 W US 0309640W WO 03088019 A2 WO03088019 A2 WO 03088019A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- patch
- microcode patch
- microcode
- digital signature
- hash digest
- Prior art date
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
- G06F21/57—Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
- G06F21/572—Secure firmware programming, e.g. of basic input output system [BIOS]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/445—Program loading or initiating
Definitions
- a typical instruction in a computer processor performs a series of operations, with microinstructions that define each operation being encoded in a nonvolatile storage area in the form of microcode.
- the microcode defines all or a portion of the executable instruction set for the processor, and may also define internal operations that are not implemented in software-accessible code.
- the microcode is typically placed in a read-only memory (ROM) within the processor at the time the processor is manufactured.
- ROM read-only memory
- microcode sometimes needs to be modified after the processor is manufactured, and even after the processor has been placed into operation. Microcode patches allow such modification by inserting new microinstructions in place of the original microinstructions.
- microcode patches can be delivered to the processor in various ways (such as by being downloaded over a communications channel, installed by a service technician, or provided with an operating system), and are then stored in the processor for operational use. Since the microcode ROM cannot be easily altered, microcode patches are typically placed into a patch memory within the processor, such as a random-access memory (RAM), and references to the modified microinstructions are redirected into the patch RAM rather than the ROM. Because the patch RAM may be volatile, the microcode patches are usually stored either on disk or in the Basic Input-Output System (BIOS), and are loaded into the patch RAM when the system is booted.
- BIOS Basic Input-Output System
- Fig. 1 shows a block diagram of a system to validate and install microcode patches, according to one embodiment of the invention.
- FIG. 2 shows a block diagram of a system to convert microcode patches into a secure form for delivery, according to one embodiment of the invention.
- Fig. 3 shows a patch package containing elements delivered from the system of Fig. 2 to the system of Fig. 1, according to one embodiment of the invention.
- Fig. 4 shows a flow chart of an overall process for preparing, delivering, and validating a patch package, according to one embodiment of the invention.
- Fig. 5 shows a flow chart of a process for preparing a patch package, according to one embodiment of the invention.
- Fig. 6 shows a flow chart of a process for validating a patch package, according to one embodiment of the invention.
- references to "one embodiment”, “an embodiment”, “example embodiment”, “various embodiments”, etc., indicate that the embodiment(s) described may include a particular feature, structure, or characteristic, but not every embodiment necessarily includes the particular feature, structure, or characteristic. Also, the features, structures, or characteristics described for different embodiments may be combined into a single embodiment. Further, repeated use of the phrase “in one embodiment” does not necessarily refer to the same embodiment, although it may. [0011 ] References herein to cryptography may include one or both of encryption and decryption.
- references herein to "symmetric" cryptography, keys, encryption, or decryption refer to cryptographic techniques in which the same key is used for encryption and the associated decryption.
- the well known Data Encryption Standard (DES) published in 1993 as Federal Information Publishing Standard FTPS PUB 46-2, and Advanced Encryption Standard (AES), published in 2001 as FTPS PUB 197, are examples of symmetric cryptography.
- Reference herein to "asymmetric” cryptography, keys, encryption, or decryption refer to cryptographic techniques in which different but related keys are used for encryption and the associated decryption.
- So called “public key” cryptographic techniques including the well-known Rivest-Shamir-Adleman (RSA) technique, are examples of asymmetric cryptography.
- RSA Rivest-Shamir-Adleman
- Embodiments of the invention may be implemented in one or a combination of hardware, firmware, and software. Embodiments of the invention may also be implemented as instructions stored on a machine-readable medium, which may be read and executed by at least one processor to perform the operations described herein.
- a machine-readable medium may include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computer).
- a machine- readable medium may include read only memory (ROM); random access memory (RAM); magnetic disk storage media; optical storage media; flash memory devices; electrical, optical, acoustical or other form of propagated signals (e.g., carrier waves, infrared signals, digital signals, etc.), and others.
- ROM read only memory
- RAM random access memory
- magnetic disk storage media e.g., magnetic disks
- optical storage media e.g., magnetic disks, magnetic disks, and other form of propagated signals (e.g., carrier waves, infrared signals, digital signals, etc.), and others.
- electrical, optical, acoustical or other form of propagated signals e.g., carrier waves, infrared signals, digital signals, etc.
- Various embodiments of the invention involve the encoding and/or decoding of a microcode patch (also referred to herein simply as a 'patch') so that the patch can be authenticated as valid before being installed in a target processor (a
- Encoding/decoding may include one or more of: 1) encryption/decryption, 2) the use of cryptographic hash functions, 3) the use of digital signatures, 4) etc.
- a target system is the system in which the patch is to be installed, while an originating system is the system that prepares the patch for secure delivery to the target system.
- a common set of patches is produced for a particular type of computer system, where "type" may indicate a particular generation, a particular model number, some category within the model number, etc.
- a patch Once a patch is produced, it may be encoded in the manner described herein before delivery to each of the target systems for which it is intended. Within each target system, one or more patches may be decoded and installed as described herein so that the patches become an operational part of the target system.
- any convenient method of delivery may be used, including but not limited to delivery over a communications link, installation by a technician, inclusion in an operating system by the manufacturer of that operating system, inclusion in a basic input output system (BIOS), etc.
- the patch Once delivered, the patch may be stored in its encoded form until it is operationally installed. Operational installation includes decoding the encoded patch, validating that the patch is authorized, and placing the patch into a patch memory. Validating may include either or both of: 1) determining that the patch has not been modified since it was prepared for delivery in the origination system, and 2) determining that the patch was prepared in an authorized system.
- the encoded patch is stored on disk or in the BIOS of the target system, to be operationally installed in volatile patch RAM each time the system is booted. In another embodiment, the encoded patch is operationally installed in non-volatile patch memory and is not reinstalled during subsequent reboots.
- Fig. 1 shows a block diagram of a system to validate and install microcode patches, according to one embodiment of the invention.
- system 100 includes a processor 110, chipset 130, disk 140, main memory 150, and communications interface (Comm I/F) 160.
- Processor 110 may include microcode ROM 112, a patch memory 114, a secure memory 118, and one or more keys 116.
- Chipset 130 may include BIOS 132.
- a patch package, described later, may be stored in at least one of disk 140, BIOS 132, or another part of system 100 that includes non- volatile storage.
- the operations of decoding, validating and installing the patch may be performed by a sequence of microinstructions contained in microcode ROM 112.
- the sequence is initiated by executing a special instruction that transfers execution to the entry point of the sequence.
- the sequence is initiated in response to writing a predetermined value to a predetermined section of a machine-specific register (MSR).
- MSR machine-specific register
- Other methods may also be used to initiate the sequence.
- the data being operated upon during the decoding, validating and installing of the patch may be located in secure memory 118, which may be secured in a manner that makes it unavailable for access by non-secure code.
- secure memory 118 may contain, at various times, the encoded patch, the decoded patch, and interim products created during decoding of the encoded patch. In one embodiment, secure memory 118 does not have enough capacity to hold all of the aforementioned patches and/or interim products, and may simultaneously contain only portions of one or more of the encoded patch, decoded patch, and the interim products. [0018] In one embodiment, secure memory 118 is a dedicated RAM memory which may be disposed either inside or outside of processor 110, that is used only for secure operations. In another embodiment, secure memory 118 is a dedicated cache of processor 110, and access to the dedicated cache is blocked to all other operations during the decoding, validating, and installing of the patch.
- BIOS 132 may be included in processor 110, and another embodiment may not have a chipset 130.
- keys 116 are one or more security keys (values that are used in encoding and/or decoding) that have been embedded in processor 110.
- Embedded keys are manufactured into the processor 110 in a manner that prevents them from being changed by system 100's software and that prevents them from being read by non-secure software.
- embedded keys may not be read directly by any software, but one or more particular instructions may cause a specific embedded key to be transferred into other hardware for use in a decoding sequence.
- a particular embedded key is one of the two keys for an asymmetric cryptographic algorithm, with the other of the two keys being kept in the patch origination system under secure control.
- a particular embedded key includes a hash value of a public key for an asymmetric cryptographic algorithm, the public key being delivered with the associated patch.
- Other embodiments may include other types of keys as embedded keys.
- microcode 112 is located in nonvolatile storage such as read only memory (ROM) and cannot be directly altered after manufacture.
- a patch may be placed in patch memory 114 for system operation so that in response to a reference to a section of modified microcode, the reference is redirected to patch memory 114 to access the modified microcode.
- patch memory 114 includes RAM, and the patch is installed in the RAM of patch memory 114 each time the system 100 is reset and/or rebooted.
- patch memory 114 includes a non- volatile form of memory such as flash memory, and once installed, each patch remains intact in patch memory 114 until the patch is replaced by a subsequent patch.
- an encoded patch may be stored in non-volatile memory such as the BIOS 132 or on disk 140, to be decoded and validated each time the patch is installed in patch memory 114.
- a patch from a BIOS vendor may be stored in BIOS 132 and installed by BIOS-resident code during an initial boot process.
- a patch from an operating system (OS) vendor may be stored on disk and installed by an OS boot loader later in the boot process. Both embodiments may be combined in the same system.
- patches are delivered over a communications connection (e.g. the Internet) and are received through Comm I/F 160 and stored for use. In other embodiments, patches may be delivered through other means.
- system 200 shows a block diagram of a system to convert patches into a secure form for delivery, according to one embodiment of the invention.
- system 200 includes a processor 210, chipset 230, disk 240, main memory 250, and communications interface 260.
- the basic functions of each of these devices may be similar to their counterparts in Fig. 1.
- system 200 is in a protectable centralized installation where protection against attackers may be provided for the overall system 200. In the illustrated embodiment, this protection may be provided by a secure perimeter 270.
- perimeter is conceptual rather than physical, and secure perimeter 270 may include numerous protective measures, including but not limited to physical protection of the system 200, limited access of personnel to the system 200, a firewall or other protective software device to prevent unauthorized invasion of the system through communications interface 260, etc.
- System 200 may also utilize internal security features similar to those shown in Fig. 1.
- system 200 is used to generate patch packages for a single type of target system.
- system 200 is used to generate different patch packages for multiple types of target systems.
- the code for the patches may either be generated in system 200, or may be generated elsewhere and delivered to system 200 for preparation of the associated patch packages.
- Information to be used and stored in system 200 may include one or more of, but is not limited to, non- encrypted patches 244, encrypted patches 242, and associated keys 246, all of which are shown stored on disk 240. Since different target systems may require different patches and involve different keys, disk 240 may be segmented into different storage areas, each storage area for a separate set of patches and associated key(s).
- Fig. 3 shows a patch package containing elements deliverable from the system of Fig. 2 to the system of Fig. 1, according to one embodiment of the invention.
- a patch package 300 includes a patch header 310, a patch 320, and a digital signature 330. Another embodiment may also include one or more deliverable keys 340.
- the patch header 310 contains identifying information that may identify one or more of, but is not limited to, the following: the type of target system for which the patch is intended, the type of patch, where the patch is to be used, how the patch is to be used, and any other relevant information that may be needed by the target system 100.
- patch header 310 is not encrypted, to facilitate identification and disposition of the patch package 300 by the target system 100 before authentication and/or decryption of the patch.
- Patch 320 contains the microcode for placement in patch memory 114, although patch 320 may be in encrypted form while in patch package 300. Encryption of patch 320 may be used to protect trade secrets or other confidential information that could be derived from the patch itself.
- Digital signature 330 includes data for validating the authenticity of the patch to be installed, so that a change to the patch after preparation of the patch package may be detected. In one embodiment the digital signature 330 is generated only for patch 320. In another embodiment the digital signature 330 is generated for both the patch 320 and the patch header 310, so that an unauthorized alteration to either may be detected by the target system 100. In still other embodiments, the digital signature 330 may also be generated for other components of patch package
- all keys needed by target system 100 are embedded in processor 110 at the time of manufacture.
- patch package 300 does not include any keys to be used in decoding the patch.
- one or more of the keys to be used by the system 100 are delivered to the system 100 as a part of patch package 300, and are designated herein as deliverable keys 340 (the plural term "keys" also encompasses embodiments having only a single deliverable key). Deliverable keys 340 may be associated with other keys that are used either in target system 100 or origination system 200.
- a deliverable key includes the public key of a public/private key pair in an asymmetric cryptographic algorithm, with the private key remaining in the origination system 200, and a hash value derived from the public key is embedded in processor 100 and is used to validate the authenticity of the delivered public key.
- An embedded hash value may also be used to validate one or more keys provided through other means, e.g. key(s) placed on disk with an operating system upgrade or placed into BIOS with a BIOS upgrade. Other embodiments may use other combinations of keys and encryption schemes.
- Each of the elements of patch package 300 is described in more detail later in the disclosure.
- an embedded key or hash value may be used with a chain of key certificates.
- the embedded key or hash value is used to validate a second key, which is used to validate a third key, etc., thus providing multiple layers of security with each key associated with a particular layer.
- the keys may be delivered through one or more of the previously mentioned delivery methods, and/or through other methods not described.
- Fig. 4 shows a flowchart of an overall process for preparing, delivering and validating a patch package according to one embodiment of the invention.
- flowchart 400 has two parts.
- Blocks 410 through 430 show a patch origination process, in which a patch origination system prepares an existing patch for secure delivery.
- Blocks 440 through 495 show a patch validation/installation process, which is performed in the target system.
- the patch origination process begins with encrypting the patch at block 410.
- some embodiments may not encrypt the patch because the contents of the patch are not considered confidential and do not need protection.
- the operations of blocks 420 and 430 may be used to permit detection of tampering with the patch before its installation in the target system.
- a digital signature is generated for the patch.
- the digital signature is generated for both the patch header and the patch so that neither may be tampered with without detection.
- the digital signature is generated for the patch but not the patch header.
- the digital signature is also generated for the deliverable keys.
- the digital signature and the patch, along with any other included elements, are combined to form a patch package. If the patch was encrypted at block 410 then the encrypted patch is included at block 430.
- the patch package may be delivered to the target system through any feasible means.
- the patch validation/installation process which takes place in the target system, begins at block 440 with the patch package being received and stored.
- the patch package may be stored on the disk 140, in the BIOS 132, or in any feasible storage location in target system 100.
- patches are not installed in an operational condition until the system is booted, a process which begins at block 450.
- the digital signature from the patch package is decrypted and is used to validate the patch at block 470. Decryption and validation may take any of several forms as described later. If the patch was encrypted at block 410, then it is decrypted at block 480 to expose the actual patch.
- the exposed patch is installed in processor 110 in a manner that makes it operational.
- processor 110 may operate using the patched microcode.
- Fig. 5 shows a flowchart of a process for preparing a patch package, according to one embodiment of the invention.
- Flowchart 500 shows a more detailed description of the patch origination process of Fig. 4.
- the embodiment shown in Fig. 5 includes an encryption of the patch and the creation of a digest to be used to validate that the received patch is correct.
- encryption of the patch is performed with a symmetric encryption algorithm (e.g., AES, DES, etc.)
- a digest is a parameter obtained by performing an operation on a block of data, in which identical blocks of data produce identical digests, but any change in the block of data is likely to produce a different digest.
- the digest is a hash digest, i.e., a digest created by applying a hashing algorithm to the patch.
- the digest is created first and then the patch is encrypted, while in another embodiment the patch is encrypted first and then the digest is created for the encrypted patch.
- Fig. 5 shows both embodiments.
- the unencrypted patch and the patch header are subjected to a hash process to create a digest.
- the hash process uses the Secure Hash Algorithm (SHA-1), published in 1994 under the Federal Information Publishing Standard FIPS PUB 180-1.
- the patch is encrypted. If the patch is not to be encrypted, block 520 may be omitted.
- the patch is encrypted first and at block 540 the encrypted patch and the patch header are subjected to the hash process to create the digest.
- the digest may be padded (i.e., data added to it) to increase the number of bits as needed.
- the pad may consist of predetermined data or random data.
- the padded digest is encrypted to create a digital signature.
- the padded digest is encrypted using the private key of a public/private key pair in an asymmetric encryption process.
- the encryption follows the RSA encryption process using a 2048-bit private key. As is well known, in the RSA encryption process both the key and the encrypted message have the same number of bits, necessitating that the digest be padded at block 550 if the digest is smaller than the key.
- Fig. 6 shows a flowchart of a process for validating a patch package, according to one embodiment of the invention.
- Flowchart 600 shows a more detailed description of the patch validation and installation process of Fig. 4.
- the patch package is obtained from within the target system.
- the patch package was previously received by the target system and placed in storage, and is obtained from that storage.
- the patch package is obtained at block 610 as soon as it is received by the target system, without intermediate storage. While in one embodiment the entire patch package as delivered by the originating system is obtained, in another embodiment any unnecessary elements of the package are stripped away before the patch package is obtained.
- a hash value may be calculated for the key at block 612. If this calculated hash value matches an associated hash value embedded in processor 110, then the key has been validated and may be used in subsequent validation operations. If the calculated hash value does not match the embedded hash value, then validation fails and control may move to block 690, which is described later. In an embodiment that does not involve a delivered key, the operations of blocks 612 and 614 may be omitted. [0035] At block 620, the digital signature is decrypted to obtain the digest created in the originating system.
- the digital signature was generated with an asymmetric encryption algorithm using the private key of a public/private key pair, and the decryption of block 620 is performed using the associated public key. If the digest was padded during creation, then the operation of block 620 obtains the padded digest, and at block 630 the pad is removed to expose the digest that was previously generated in block 510 or block 540. If the digest was not padded during creation, then the operation of block 620 produces the non-padded digest, and block 630 may be omitted. [0036] At this point, the process followed depends on whether the digest was created before or after the patch was encrypted in flowchart 500.
- the patch is decrypted and a hash function is performed on the decrypted patch and patch header at block 650 to get a calculated digest.
- the calculated digest is compared with the actual digest obtained in blocks 620-630 to see if the two digests match. If the two digests are equivalent, then the patch has been validated and the patch may be installed at block 680.
- installing the patch includes placing the patch into the patch memory 114 of processor 110 in such a manner that any attempted access to the patched microcode will be directed to the patch memory 114 rather than to the original microcode 112.
- the encrypted patch and header may be subjected to a hash operation to get the calculated digest.
- the calculated digest may be compared with the actual digest uncovered at block 630 to see if they match. If they are found to be equivalent, then the patch has been validated and the patch may be decrypted at block 670. The validated and decrypted patch may then be installed at block 680.
- the hash operation used at blocks 645, 650 is the same hash operation that was used at blocks 510, 540.
- the patch installation process may be aborted at block 690 by not installing the non- validated patch.
- Aborting the patch installation may take several forms, including but not limited to: 1) attempting to reinstall the patch, 2) skipping the defective patch but installing other patches, 3) reverting to a previous version of the patch, 4) shutting the system down, 5) rebooting the system, 6) etc.
- the validation process of blocks 610-670 is performed for the entire patch in secure memory 118, and after validation the entire patch is installed in patch memory 114 at block 680.
- the validation process of blocks 610-670 may be performed incrementally on separate portions of the patch. If any portion is not validated in this manner, the process may be aborted at block 690 as previously described. If all portions are validated in this manner, the patch may be validated incrementally a second time, with each portion being installed in patch memory 114 as it is validated.
- the process may be aborted at block 690. If any portion of the patch is not validated on the second pass (which could indicate it was tampered with after the first validation), the process may be aborted at block 690. If the patch has been partially installed before being aborted at block 690, the abort process of block 690 may include removing the newly-installed patch from patch memory 114, in addition to one or more of the previously listed abort processes. [0040] The foregoing description is intended to be illustrative and not limiting.
Abstract
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0422098A GB2403047B (en) | 2002-04-12 | 2003-03-28 | Microcode patch authentication |
AU2003224803A AU2003224803A1 (en) | 2002-04-12 | 2003-03-28 | Microcode patch authentication |
CN038133962A CN1659494B (en) | 2002-04-12 | 2003-03-28 | Microcode patch authentication |
DE10392528T DE10392528T5 (en) | 2002-04-12 | 2003-03-28 | Microcode patch authentication |
HK05100391A HK1068423A1 (en) | 2002-04-12 | 2005-01-14 | Microcode patch authentication |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/121,807 | 2002-04-12 | ||
US10/121,807 US20030196096A1 (en) | 2002-04-12 | 2002-04-12 | Microcode patch authentication |
Publications (2)
Publication Number | Publication Date |
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WO2003088019A2 true WO2003088019A2 (en) | 2003-10-23 |
WO2003088019A3 WO2003088019A3 (en) | 2004-03-04 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/US2003/009640 WO2003088019A2 (en) | 2002-04-12 | 2003-03-28 | Microcode patch authentication |
Country Status (8)
Country | Link |
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US (1) | US20030196096A1 (en) |
CN (1) | CN1659494B (en) |
AU (1) | AU2003224803A1 (en) |
DE (1) | DE10392528T5 (en) |
GB (2) | GB2403047B (en) |
HK (1) | HK1068423A1 (en) |
TW (1) | TWI268449B (en) |
WO (1) | WO2003088019A2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102007016170A1 (en) * | 2007-04-02 | 2008-10-09 | Francotyp-Postalia Gmbh | Security module for a franking machine |
US7926050B2 (en) | 2004-06-17 | 2011-04-12 | Nagravision S.A. | Secure method to update software in a security module |
Families Citing this family (81)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7380120B1 (en) | 2001-12-12 | 2008-05-27 | Guardian Data Storage, Llc | Secured data format for access control |
US7921284B1 (en) | 2001-12-12 | 2011-04-05 | Gary Mark Kinghorn | Method and system for protecting electronic data in enterprise environment |
US10360545B2 (en) | 2001-12-12 | 2019-07-23 | Guardian Data Storage, Llc | Method and apparatus for accessing secured electronic data off-line |
US7260555B2 (en) | 2001-12-12 | 2007-08-21 | Guardian Data Storage, Llc | Method and architecture for providing pervasive security to digital assets |
US8006280B1 (en) | 2001-12-12 | 2011-08-23 | Hildebrand Hal S | Security system for generating keys from access rules in a decentralized manner and methods therefor |
USRE41546E1 (en) | 2001-12-12 | 2010-08-17 | Klimenty Vainstein | Method and system for managing security tiers |
US7681034B1 (en) | 2001-12-12 | 2010-03-16 | Chang-Ping Lee | Method and apparatus for securing electronic data |
US7921450B1 (en) | 2001-12-12 | 2011-04-05 | Klimenty Vainstein | Security system using indirect key generation from access rules and methods therefor |
US7565683B1 (en) | 2001-12-12 | 2009-07-21 | Weiqing Huang | Method and system for implementing changes to security policies in a distributed security system |
US8065713B1 (en) | 2001-12-12 | 2011-11-22 | Klimenty Vainstein | System and method for providing multi-location access management to secured items |
US7178033B1 (en) | 2001-12-12 | 2007-02-13 | Pss Systems, Inc. | Method and apparatus for securing digital assets |
US7921288B1 (en) | 2001-12-12 | 2011-04-05 | Hildebrand Hal S | System and method for providing different levels of key security for controlling access to secured items |
US10033700B2 (en) | 2001-12-12 | 2018-07-24 | Intellectual Ventures I Llc | Dynamic evaluation of access rights |
US7930756B1 (en) | 2001-12-12 | 2011-04-19 | Crocker Steven Toye | Multi-level cryptographic transformations for securing digital assets |
US7950066B1 (en) | 2001-12-21 | 2011-05-24 | Guardian Data Storage, Llc | Method and system for restricting use of a clipboard application |
US8176334B2 (en) | 2002-09-30 | 2012-05-08 | Guardian Data Storage, Llc | Document security system that permits external users to gain access to secured files |
US8613102B2 (en) | 2004-03-30 | 2013-12-17 | Intellectual Ventures I Llc | Method and system for providing document retention using cryptography |
US7748045B2 (en) | 2004-03-30 | 2010-06-29 | Michael Frederick Kenrich | Method and system for providing cryptographic document retention with off-line access |
US7512810B1 (en) | 2002-09-11 | 2009-03-31 | Guardian Data Storage Llc | Method and system for protecting encrypted files transmitted over a network |
US7983414B2 (en) * | 2002-09-11 | 2011-07-19 | Giesecke & Devrient Gmbh | Protected cryptographic calculation |
US7836310B1 (en) | 2002-11-01 | 2010-11-16 | Yevgeniy Gutnik | Security system that uses indirect password-based encryption |
US7440571B2 (en) * | 2002-12-03 | 2008-10-21 | Nagravision S.A. | Method for securing software updates |
US7890990B1 (en) | 2002-12-20 | 2011-02-15 | Klimenty Vainstein | Security system with staging capabilities |
US8707034B1 (en) | 2003-05-30 | 2014-04-22 | Intellectual Ventures I Llc | Method and system for using remote headers to secure electronic files |
US7730543B1 (en) | 2003-06-30 | 2010-06-01 | Satyajit Nath | Method and system for enabling users of a group shared across multiple file security systems to access secured files |
US20050044408A1 (en) * | 2003-08-18 | 2005-02-24 | Bajikar Sundeep M. | Low pin count docking architecture for a trusted platform |
US7703140B2 (en) | 2003-09-30 | 2010-04-20 | Guardian Data Storage, Llc | Method and system for securing digital assets using process-driven security policies |
US8127366B2 (en) | 2003-09-30 | 2012-02-28 | Guardian Data Storage, Llc | Method and apparatus for transitioning between states of security policies used to secure electronic documents |
US20050223292A1 (en) * | 2004-02-17 | 2005-10-06 | Lee Chee S | Single instruction type based hardware patch controller |
US7873831B2 (en) * | 2004-02-26 | 2011-01-18 | Microsoft Corporation | Digests to identify elements in a signature process |
US7707427B1 (en) * | 2004-07-19 | 2010-04-27 | Michael Frederick Kenrich | Multi-level file digests |
US7353375B2 (en) * | 2004-10-07 | 2008-04-01 | Hewlett-Packard Development Company, L.P. | Method and apparatus for managing processor availability using a microcode patch |
IL164571A0 (en) * | 2004-10-14 | 2005-12-18 | Yuval Broshy | A system and method for authenticating and validating the validating the linkage between input filesand output files in a computational process |
US8028154B2 (en) * | 2005-07-29 | 2011-09-27 | Broadcom Corporation | Method and system for reducing instruction storage space for a processor integrated in a network adapter chip |
US7689819B2 (en) * | 2005-07-29 | 2010-03-30 | Broadcom Corporation | Method and system for a self-booting Ethernet controller |
US7523299B2 (en) * | 2005-07-29 | 2009-04-21 | Broadcom Corporation | Method and system for modifying operation of ROM based boot code of a network adapter chip |
US20070088939A1 (en) * | 2005-10-17 | 2007-04-19 | Dan Baumberger | Automatic and dynamic loading of instruction set architecture extensions |
US20070113064A1 (en) * | 2005-11-17 | 2007-05-17 | Longyin Wei | Method and system for secure code patching |
US20080104403A1 (en) * | 2006-09-29 | 2008-05-01 | Shay Gueron | Methods and apparatus for data authentication with multiple keys |
US9280337B2 (en) * | 2006-12-18 | 2016-03-08 | Adobe Systems Incorporated | Secured distribution of software updates |
US8538015B2 (en) | 2007-03-28 | 2013-09-17 | Intel Corporation | Flexible architecture and instruction for advanced encryption standard (AES) |
US20090031121A1 (en) * | 2007-07-24 | 2009-01-29 | Via Technologies | Apparatus and method for real-time microcode patch |
US20090031107A1 (en) * | 2007-07-24 | 2009-01-29 | Via Technologies | On-chip memory providing for microcode patch overlay and constant update functions |
US20090031103A1 (en) * | 2007-07-24 | 2009-01-29 | Via Technologies | Mechanism for implementing a microcode patch during fabrication |
US20090031110A1 (en) * | 2007-07-24 | 2009-01-29 | Via Technologies | Microcode patch expansion mechanism |
US20090031108A1 (en) * | 2007-07-24 | 2009-01-29 | Via Technologies | Configurable fuse mechanism for implementing microcode patches |
US20090031090A1 (en) * | 2007-07-24 | 2009-01-29 | Via Technologies | Apparatus and method for fast one-to-many microcode patch |
US8375219B2 (en) * | 2007-10-24 | 2013-02-12 | Microsoft Corporation | Program and operation verification |
WO2009090505A1 (en) * | 2008-01-20 | 2009-07-23 | Nds Limited | Secure data utilization |
US8954696B2 (en) | 2008-06-24 | 2015-02-10 | Nagravision S.A. | Secure memory management system and method |
KR101567620B1 (en) * | 2008-06-24 | 2015-11-20 | 나그라비젼 에스에이 | Secure memory management system and method |
TW201009707A (en) * | 2008-08-25 | 2010-03-01 | Asustek Comp Inc | Method for loading and updating central processing unit (CPU) microcode into basic input/output system (BIOS) |
US8341419B2 (en) * | 2008-09-09 | 2012-12-25 | Via Technologies, Inc. | Apparatus and method for limiting access to model specific registers in a microprocessor |
US8402279B2 (en) * | 2008-09-09 | 2013-03-19 | Via Technologies, Inc. | Apparatus and method for updating set of limited access model specific registers in a microprocessor |
US20100180104A1 (en) * | 2009-01-15 | 2010-07-15 | Via Technologies, Inc. | Apparatus and method for patching microcode in a microprocessor using private ram of the microprocessor |
US8423779B2 (en) * | 2009-02-23 | 2013-04-16 | Wms Gaming, Inc. | Compounding security with a security dongle |
US8316243B2 (en) * | 2009-08-07 | 2012-11-20 | Via Technologies, Inc. | Apparatus and method for generating unpredictable processor-unique serial number for use as an encryption key |
US20110153944A1 (en) * | 2009-12-22 | 2011-06-23 | Klaus Kursawe | Secure Cache Memory Architecture |
TWI497344B (en) * | 2010-05-17 | 2015-08-21 | Via Tech Inc | Microprocessor and method for generating unpredictable key |
CA2745975C (en) * | 2010-07-09 | 2016-02-23 | Research In Motion Limited | Utilization of a microcode interpreter built in to a processor |
EP2591437B1 (en) * | 2010-07-09 | 2018-11-14 | BlackBerry Limited | Microcode-based challenge/response process |
TWI467408B (en) * | 2011-11-15 | 2015-01-01 | Mstar Semiconductor Inc | Embedded devices and control methods thereof |
US9262631B2 (en) | 2011-11-15 | 2016-02-16 | Mstar Semiconductor, Inc. | Embedded device and control method thereof |
US10031737B2 (en) * | 2012-02-16 | 2018-07-24 | Microsoft Technology Licensing, Llc | Downloading and distribution of applications and updates to multiple devices |
ITMI20120944A1 (en) * | 2012-05-31 | 2013-12-01 | St Microelectronics Srl | CONTROL UNIT OF POWER CIRCUITS FOR ONE OR MORE LOADING POINTS OF AN ELECTRONIC SYSTEM WITH EXTERNAL CUSTOMIZATION NVM |
US9792112B2 (en) | 2013-08-28 | 2017-10-17 | Via Technologies, Inc. | Propagation of microcode patches to multiple cores in multicore microprocessor |
US9465432B2 (en) | 2013-08-28 | 2016-10-11 | Via Technologies, Inc. | Multi-core synchronization mechanism |
US9535488B2 (en) | 2013-08-28 | 2017-01-03 | Via Technologies, Inc. | Multi-core microprocessor that dynamically designates one of its processing cores as the bootstrap processor |
CN105306505A (en) * | 2014-07-11 | 2016-02-03 | 腾讯科技(深圳)有限公司 | Data updating methods, terminal and server |
CN104899524B (en) * | 2015-05-25 | 2018-11-27 | 上海兆芯集成电路有限公司 | The method of central processing unit and verifying motherboard data |
CN106709281B (en) * | 2015-07-14 | 2019-09-17 | 阿里巴巴集团控股有限公司 | Patch granting and acquisition methods, device |
CN106559339B (en) | 2015-09-30 | 2019-02-19 | 华为技术有限公司 | A kind of message processing method and device |
CN105302606A (en) * | 2015-11-03 | 2016-02-03 | 用友网络科技股份有限公司 | Project permission based patch downloading method and system |
US10659234B2 (en) * | 2016-02-10 | 2020-05-19 | Cisco Technology, Inc. | Dual-signed executable images for customer-provided integrity |
TWI615732B (en) * | 2016-12-27 | 2018-02-21 | 瑞昱半導體股份有限公司 | Electronic component of electronic device, method of starting electronic device and encryption method |
CN108052836B (en) * | 2017-12-11 | 2021-06-04 | 北京奇虎科技有限公司 | Anti-tampering method and device for patch package and server |
JP2020098506A (en) * | 2018-12-18 | 2020-06-25 | ルネサスエレクトロニクス株式会社 | Microcontroller and semiconductor device |
US11481206B2 (en) | 2019-05-16 | 2022-10-25 | Microsoft Technology Licensing, Llc | Code update in system management mode |
US11100229B2 (en) * | 2019-07-18 | 2021-08-24 | Infineon Technologies Ag | Secure hybrid boot systems and secure boot procedures for hybrid systems |
US11385903B2 (en) * | 2020-02-04 | 2022-07-12 | Microsoft Technology Licensing, Llc | Firmware update patch |
US11681513B2 (en) | 2020-05-14 | 2023-06-20 | Texas Instmments Incorporated | Controlled scope of authentication key for software update |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5901225A (en) * | 1996-12-05 | 1999-05-04 | Advanced Micro Devices, Inc. | System and method for performing software patches in embedded systems |
US6269392B1 (en) * | 1994-11-15 | 2001-07-31 | Christian Cotichini | Method and apparatus to monitor and locate an electronic device using a secured intelligent agent |
Family Cites Families (99)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3699532A (en) * | 1970-04-21 | 1972-10-17 | Singer Co | Multiprogramming control for a data handling system |
US3996449A (en) * | 1975-08-25 | 1976-12-07 | International Business Machines Corporation | Operating system authenticator |
US4162536A (en) * | 1976-01-02 | 1979-07-24 | Gould Inc., Modicon Div. | Digital input/output system and method |
US4037214A (en) * | 1976-04-30 | 1977-07-19 | International Business Machines Corporation | Key register controlled accessing system |
US4247905A (en) * | 1977-08-26 | 1981-01-27 | Sharp Kabushiki Kaisha | Memory clear system |
US4278837A (en) * | 1977-10-31 | 1981-07-14 | Best Robert M | Crypto microprocessor for executing enciphered programs |
US4276594A (en) * | 1978-01-27 | 1981-06-30 | Gould Inc. Modicon Division | Digital computer with multi-processor capability utilizing intelligent composite memory and input/output modules and method for performing the same |
US4207609A (en) * | 1978-05-08 | 1980-06-10 | International Business Machines Corporation | Method and means for path independent device reservation and reconnection in a multi-CPU and shared device access system |
JPS5823570B2 (en) * | 1978-11-30 | 1983-05-16 | 国産電機株式会社 | Liquid level detection device |
JPS5576447A (en) * | 1978-12-01 | 1980-06-09 | Fujitsu Ltd | Address control system for software simulation |
US4307447A (en) * | 1979-06-19 | 1981-12-22 | Gould Inc. | Programmable controller |
US4307214A (en) * | 1979-12-12 | 1981-12-22 | Phillips Petroleum Company | SC2 activation of supported chromium oxide catalysts |
US4319323A (en) * | 1980-04-04 | 1982-03-09 | Digital Equipment Corporation | Communications device for data processing system |
US4419724A (en) * | 1980-04-14 | 1983-12-06 | Sperry Corporation | Main bus interface package |
US4366537A (en) * | 1980-05-23 | 1982-12-28 | International Business Machines Corp. | Authorization mechanism for transfer of program control or data between different address spaces having different storage protect keys |
US4403283A (en) * | 1980-07-28 | 1983-09-06 | Ncr Corporation | Extended memory system and method |
DE3034581A1 (en) * | 1980-09-13 | 1982-04-22 | Robert Bosch Gmbh, 7000 Stuttgart | READ-OUT LOCK FOR ONE-CHIP MICROPROCESSORS |
JPS58140862A (en) * | 1982-02-16 | 1983-08-20 | Toshiba Corp | Mutual exclusion system |
US4521852A (en) * | 1982-06-30 | 1985-06-04 | Texas Instruments Incorporated | Data processing device formed on a single semiconductor substrate having secure memory |
JPS59111561A (en) * | 1982-12-17 | 1984-06-27 | Hitachi Ltd | Access controlling system of composite processor system |
US4759064A (en) * | 1985-10-07 | 1988-07-19 | Chaum David L | Blind unanticipated signature systems |
US4975836A (en) * | 1984-12-19 | 1990-12-04 | Hitachi, Ltd. | Virtual computer system |
JPS61206057A (en) * | 1985-03-11 | 1986-09-12 | Hitachi Ltd | Address converting device |
FR2592510B1 (en) * | 1985-12-31 | 1988-02-12 | Bull Cp8 | METHOD AND APPARATUS FOR CERTIFYING SERVICES OBTAINED USING A PORTABLE MEDIUM SUCH AS A MEMORY CARD |
FR2601535B1 (en) * | 1986-07-11 | 1988-10-21 | Bull Cp8 | METHOD FOR CERTIFYING THE AUTHENTICITY OF DATA EXCHANGED BETWEEN TWO DEVICES CONNECTED LOCALLY OR REMOTELY THROUGH A TRANSMISSION LINE |
FR2601525B1 (en) * | 1986-07-11 | 1988-10-21 | Bull Cp8 | SECURITY DEVICE PROHIBITING THE OPERATION OF AN ELECTRONIC ASSEMBLY AFTER A FIRST SHUTDOWN OF ITS POWER SUPPLY |
FR2601476B1 (en) * | 1986-07-11 | 1988-10-21 | Bull Cp8 | METHOD FOR AUTHENTICATING EXTERNAL AUTHORIZATION DATA BY A PORTABLE OBJECT SUCH AS A MEMORY CARD |
FR2618002B1 (en) * | 1987-07-10 | 1991-07-05 | Schlumberger Ind Sa | METHOD AND SYSTEM FOR AUTHENTICATING ELECTRONIC MEMORY CARDS |
US5007082A (en) * | 1988-08-03 | 1991-04-09 | Kelly Services, Inc. | Computer software encryption apparatus |
US5079737A (en) * | 1988-10-25 | 1992-01-07 | United Technologies Corporation | Memory management unit for the MIL-STD 1750 bus |
US5434999A (en) * | 1988-11-09 | 1995-07-18 | Bull Cp8 | Safeguarded remote loading of service programs by authorizing loading in protected memory zones in a terminal |
FR2640798B1 (en) * | 1988-12-20 | 1993-01-08 | Bull Cp8 | DATA PROCESSING DEVICE COMPRISING AN ELECTRICALLY ERASABLE AND REPROGRAMMABLE NON-VOLATILE MEMORY |
JPH02171934A (en) * | 1988-12-26 | 1990-07-03 | Hitachi Ltd | Virtual machine system |
JPH02208740A (en) * | 1989-02-09 | 1990-08-20 | Fujitsu Ltd | Virtual computer control system |
JPH0617217B2 (en) * | 1989-02-28 | 1994-03-09 | 水澤化学工業株式会社 | Amorphous silica / alumina spherical particles and method for producing the same |
US5442645A (en) * | 1989-06-06 | 1995-08-15 | Bull Cp8 | Method for checking the integrity of a program or data, and apparatus for implementing this method |
JP2590267B2 (en) * | 1989-06-30 | 1997-03-12 | 株式会社日立製作所 | Display control method in virtual machine |
US5022077A (en) * | 1989-08-25 | 1991-06-04 | International Business Machines Corp. | Apparatus and method for preventing unauthorized access to BIOS in a personal computer system |
JP2825550B2 (en) * | 1989-09-21 | 1998-11-18 | 株式会社日立製作所 | Multiple virtual space address control method and computer system |
CA2010591C (en) * | 1989-10-20 | 1999-01-26 | Phillip M. Adams | Kernels, description tables and device drivers |
US5075842A (en) * | 1989-12-22 | 1991-12-24 | Intel Corporation | Disabling tag bit recognition and allowing privileged operations to occur in an object-oriented memory protection mechanism |
US5108590A (en) * | 1990-09-12 | 1992-04-28 | Disanto Dennis | Water dispenser |
US5230069A (en) * | 1990-10-02 | 1993-07-20 | International Business Machines Corporation | Apparatus and method for providing private and shared access to host address and data spaces by guest programs in a virtual machine computer system |
US5317705A (en) * | 1990-10-24 | 1994-05-31 | International Business Machines Corporation | Apparatus and method for TLB purge reduction in a multi-level machine system |
US5287363A (en) * | 1991-07-01 | 1994-02-15 | Disk Technician Corporation | System for locating and anticipating data storage media failures |
US5437033A (en) * | 1990-11-16 | 1995-07-25 | Hitachi, Ltd. | System for recovery from a virtual machine monitor failure with a continuous guest dispatched to a nonguest mode |
US5255379A (en) * | 1990-12-28 | 1993-10-19 | Sun Microsystems, Inc. | Method for automatically transitioning from V86 mode to protected mode in a computer system using an Intel 80386 or 80486 processor |
US5453003A (en) * | 1991-01-09 | 1995-09-26 | Pfefferle; William C. | Catalytic method |
US5522075A (en) * | 1991-06-28 | 1996-05-28 | Digital Equipment Corporation | Protection ring extension for computers having distinct virtual machine monitor and virtual machine address spaces |
US5319760A (en) * | 1991-06-28 | 1994-06-07 | Digital Equipment Corporation | Translation buffer for virtual machines with address space match |
US5455909A (en) * | 1991-07-05 | 1995-10-03 | Chips And Technologies Inc. | Microprocessor with operation capture facility |
JPH06236284A (en) * | 1991-10-21 | 1994-08-23 | Intel Corp | Method for preservation and restoration of computer-system processing state and computer system |
US5574936A (en) * | 1992-01-02 | 1996-11-12 | Amdahl Corporation | Access control mechanism controlling access to and logical purging of access register translation lookaside buffer (ALB) in a computer system |
US5486529A (en) * | 1992-04-16 | 1996-01-23 | Zeneca Limited | Certain pyridyl ketones for treating diseases involving leukocyte elastase |
US5421006A (en) * | 1992-05-07 | 1995-05-30 | Compaq Computer Corp. | Method and apparatus for assessing integrity of computer system software |
US5237616A (en) * | 1992-09-21 | 1993-08-17 | International Business Machines Corporation | Secure computer system having privileged and unprivileged memories |
US5293424A (en) * | 1992-10-14 | 1994-03-08 | Bull Hn Information Systems Inc. | Secure memory card |
JP2765411B2 (en) * | 1992-11-30 | 1998-06-18 | 株式会社日立製作所 | Virtual computer system |
US5668971A (en) * | 1992-12-01 | 1997-09-16 | Compaq Computer Corporation | Posted disk read operations performed by signalling a disk read complete to the system prior to completion of data transfer |
JPH06187178A (en) * | 1992-12-18 | 1994-07-08 | Hitachi Ltd | Input and output interruption control method for virtual computer system |
US5469557A (en) * | 1993-03-05 | 1995-11-21 | Microchip Technology Incorporated | Code protection in microcontroller with EEPROM fuses |
FR2703800B1 (en) * | 1993-04-06 | 1995-05-24 | Bull Cp8 | Method for signing a computer file, and device for implementing it. |
FR2704341B1 (en) * | 1993-04-22 | 1995-06-02 | Bull Cp8 | Device for protecting the keys of a smart card. |
JPH06348867A (en) * | 1993-06-04 | 1994-12-22 | Hitachi Ltd | Microcomputer |
FR2706210B1 (en) * | 1993-06-08 | 1995-07-21 | Bull Cp8 | Method for authenticating a portable object by an offline terminal, portable object and corresponding terminal. |
US5555385A (en) * | 1993-10-27 | 1996-09-10 | International Business Machines Corporation | Allocation of address spaces within virtual machine compute system |
US5584023A (en) * | 1993-12-27 | 1996-12-10 | Hsu; Mike S. C. | Computer system including a transparent and secure file transform mechanism |
CA2176032A1 (en) * | 1994-01-13 | 1995-07-20 | Bankers Trust Company | Cryptographic system and method with key escrow feature |
US5459869A (en) * | 1994-02-17 | 1995-10-17 | Spilo; Michael L. | Method for providing protected mode services for device drivers and other resident software |
US5604805A (en) * | 1994-02-28 | 1997-02-18 | Brands; Stefanus A. | Privacy-protected transfer of electronic information |
US5473692A (en) * | 1994-09-07 | 1995-12-05 | Intel Corporation | Roving software license for a hardware agent |
JPH0883211A (en) * | 1994-09-12 | 1996-03-26 | Mitsubishi Electric Corp | Data processor |
US5606617A (en) * | 1994-10-14 | 1997-02-25 | Brands; Stefanus A. | Secret-key certificates |
US5564040A (en) * | 1994-11-08 | 1996-10-08 | International Business Machines Corporation | Method and apparatus for providing a server function in a logically partitioned hardware machine |
US5802268A (en) * | 1994-11-22 | 1998-09-01 | Lucent Technologies Inc. | Digital processor with embedded eeprom memory |
US5560013A (en) * | 1994-12-06 | 1996-09-24 | International Business Machines Corporation | Method of using a target processor to execute programs of a source architecture that uses multiple address spaces |
US5555414A (en) * | 1994-12-14 | 1996-09-10 | International Business Machines Corporation | Multiprocessing system including gating of host I/O and external enablement to guest enablement at polling intervals |
US5615263A (en) * | 1995-01-06 | 1997-03-25 | Vlsi Technology, Inc. | Dual purpose security architecture with protected internal operating system |
US5717903A (en) * | 1995-05-15 | 1998-02-10 | Compaq Computer Corporation | Method and appartus for emulating a peripheral device to allow device driver development before availability of the peripheral device |
US5757915A (en) * | 1995-08-25 | 1998-05-26 | Intel Corporation | Parameterized hash functions for access control |
US5684948A (en) * | 1995-09-01 | 1997-11-04 | National Semiconductor Corporation | Memory management circuit which provides simulated privilege levels |
US5633929A (en) * | 1995-09-15 | 1997-05-27 | Rsa Data Security, Inc | Cryptographic key escrow system having reduced vulnerability to harvesting attacks |
US5657445A (en) * | 1996-01-26 | 1997-08-12 | Dell Usa, L.P. | Apparatus and method for limiting access to mass storage devices in a computer system |
US5923884A (en) * | 1996-08-30 | 1999-07-13 | Gemplus S.C.A. | System and method for loading applications onto a smart card |
US5844986A (en) * | 1996-09-30 | 1998-12-01 | Intel Corporation | Secure BIOS |
US6378072B1 (en) * | 1998-02-03 | 2002-04-23 | Compaq Computer Corporation | Cryptographic system |
US6463537B1 (en) * | 1999-01-04 | 2002-10-08 | Codex Technologies, Inc. | Modified computer motherboard security and identification system |
US6282650B1 (en) * | 1999-01-25 | 2001-08-28 | Intel Corporation | Secure public digital watermark |
US6651171B1 (en) * | 1999-04-06 | 2003-11-18 | Microsoft Corporation | Secure execution of program code |
US7213152B1 (en) * | 2000-02-14 | 2007-05-01 | Intel Corporation | Modular bios update mechanism |
US6625730B1 (en) * | 2000-03-31 | 2003-09-23 | Hewlett-Packard Development Company, L.P. | System for validating a bios program and memory coupled therewith by using a boot block program having a validation routine |
US6986052B1 (en) * | 2000-06-30 | 2006-01-10 | Intel Corporation | Method and apparatus for secure execution using a secure memory partition |
US7069452B1 (en) * | 2000-07-12 | 2006-06-27 | International Business Machines Corporation | Methods, systems and computer program products for secure firmware updates |
US6976163B1 (en) * | 2000-07-12 | 2005-12-13 | International Business Machines Corporation | Methods, systems and computer program products for rule based firmware updates utilizing certificate extensions and certificates for use therein |
US6463549B1 (en) * | 2000-09-28 | 2002-10-08 | Motorola, Inc. | Device and method for patching code residing on a read only memory module utilizing a random access memory for storing a set of fields, each field indicating validity of content of a group, and for receiving an address of a memory portion of the read only memory |
US7095858B2 (en) * | 2001-05-10 | 2006-08-22 | Ranco Incorporated Of Delaware | System and method for securely upgrading firmware |
US6993648B2 (en) * | 2001-08-16 | 2006-01-31 | Lenovo (Singapore) Pte. Ltd. | Proving BIOS trust in a TCPA compliant system |
US7484105B2 (en) * | 2001-08-16 | 2009-01-27 | Lenovo (Singapore) Ptd. Ltd. | Flash update using a trusted platform module |
US7237126B2 (en) * | 2001-09-28 | 2007-06-26 | Hewlett-Packard Development Company, L.P. | Method and apparatus for preserving the integrity of a management subsystem environment |
-
2002
- 2002-04-12 US US10/121,807 patent/US20030196096A1/en not_active Abandoned
-
2003
- 2003-03-28 DE DE10392528T patent/DE10392528T5/en not_active Ceased
- 2003-03-28 CN CN038133962A patent/CN1659494B/en not_active Expired - Fee Related
- 2003-03-28 GB GB0422098A patent/GB2403047B/en not_active Expired - Fee Related
- 2003-03-28 WO PCT/US2003/009640 patent/WO2003088019A2/en not_active Application Discontinuation
- 2003-03-28 GB GB0602345A patent/GB2419990B/en not_active Expired - Fee Related
- 2003-03-28 AU AU2003224803A patent/AU2003224803A1/en not_active Abandoned
- 2003-04-11 TW TW092108407A patent/TWI268449B/en not_active IP Right Cessation
-
2005
- 2005-01-14 HK HK05100391A patent/HK1068423A1/en not_active IP Right Cessation
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6269392B1 (en) * | 1994-11-15 | 2001-07-31 | Christian Cotichini | Method and apparatus to monitor and locate an electronic device using a secured intelligent agent |
US5901225A (en) * | 1996-12-05 | 1999-05-04 | Advanced Micro Devices, Inc. | System and method for performing software patches in embedded systems |
Non-Patent Citations (2)
Title |
---|
DAVIDA G I ET AL: "Defending systems against viruses through cryptographic authentication" PROCEEDINGS OF THE SYMPOSIUM ON SECURITY AND PRIVACY. OAKLAND, MAY 1 - 3, 1989, WASHINGTON, IEEE COMP. SOC. PRESS, US, 1 May 1989 (1989-05-01), pages 312-318, XP010016032 ISBN: 0-8186-1939-2 * |
SHERWOOD T., CALDER B.: "Patchable Instruction ROM Architecture" CASES'01, 16 - 17 November 2001, pages 24-33, XP002254429 Atlanta Georgia USA * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7926050B2 (en) | 2004-06-17 | 2011-04-12 | Nagravision S.A. | Secure method to update software in a security module |
DE102007016170A1 (en) * | 2007-04-02 | 2008-10-09 | Francotyp-Postalia Gmbh | Security module for a franking machine |
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GB0422098D0 (en) | 2004-11-03 |
DE10392528T5 (en) | 2005-09-15 |
GB0602345D0 (en) | 2006-03-15 |
AU2003224803A1 (en) | 2003-10-27 |
GB2419990B (en) | 2006-11-01 |
TWI268449B (en) | 2006-12-11 |
GB2403047A (en) | 2004-12-22 |
TW200402659A (en) | 2004-02-16 |
US20030196096A1 (en) | 2003-10-16 |
CN1659494B (en) | 2011-06-08 |
GB2403047B (en) | 2006-04-12 |
HK1068423A1 (en) | 2005-04-29 |
GB2419990A (en) | 2006-05-10 |
CN1659494A (en) | 2005-08-24 |
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