WO2002082259A3 - Method and apparatus for securing portions of memory - Google Patents

Method and apparatus for securing portions of memory Download PDF

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Publication number
WO2002082259A3
WO2002082259A3 PCT/US2002/002846 US0202846W WO02082259A3 WO 2002082259 A3 WO2002082259 A3 WO 2002082259A3 US 0202846 W US0202846 W US 0202846W WO 02082259 A3 WO02082259 A3 WO 02082259A3
Authority
WO
WIPO (PCT)
Prior art keywords
information
memory
securing portions
access
program
Prior art date
Application number
PCT/US2002/002846
Other languages
French (fr)
Other versions
WO2002082259A2 (en
Inventor
Geoffrey S Strongin
Brian C Barnes
Rodney Schmidt
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Priority to JP2002580159A priority Critical patent/JP2004530979A/en
Priority to EP02704314A priority patent/EP1374064A2/en
Priority to KR10-2003-7013056A priority patent/KR20030088492A/en
Priority to AU2002238005A priority patent/AU2002238005A1/en
Publication of WO2002082259A2 publication Critical patent/WO2002082259A2/en
Publication of WO2002082259A3 publication Critical patent/WO2002082259A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/78Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
    • G06F21/79Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1458Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1483Protection against unauthorised use of memory or access to memory by checking the subject access rights using an access-table, e.g. matrix or list

Abstract

The present invention provides a method and apparatus for securing portions of a memory. The method includes identifying information for protection and indicating at least one physical address of a memory that houses the information as at least one of read and write disabled. The method includes receiving a request from a program to access the information. The method further includes accessing the information in response to determining that the program has the authority to access the information.
PCT/US2002/002846 2001-04-04 2002-02-01 Method and apparatus for securing portions of memory WO2002082259A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2002580159A JP2004530979A (en) 2001-04-04 2002-02-01 Method and apparatus for protecting a portion of a memory
EP02704314A EP1374064A2 (en) 2001-04-04 2002-02-01 Method and apparatus for securing portions of memory
KR10-2003-7013056A KR20030088492A (en) 2001-04-04 2002-02-01 Method and apparatus for securing portions of memory
AU2002238005A AU2002238005A1 (en) 2001-04-04 2002-02-01 Method and apparatus for securing portions of memory

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/825,905 2001-04-04
US09/825,905 US7631160B2 (en) 2001-04-04 2001-04-04 Method and apparatus for securing portions of memory

Publications (2)

Publication Number Publication Date
WO2002082259A2 WO2002082259A2 (en) 2002-10-17
WO2002082259A3 true WO2002082259A3 (en) 2003-09-18

Family

ID=25245202

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2002/002846 WO2002082259A2 (en) 2001-04-04 2002-02-01 Method and apparatus for securing portions of memory

Country Status (7)

Country Link
US (1) US7631160B2 (en)
EP (1) EP1374064A2 (en)
JP (1) JP2004530979A (en)
KR (1) KR20030088492A (en)
CN (1) CN1511286A (en)
AU (1) AU2002238005A1 (en)
WO (1) WO2002082259A2 (en)

Families Citing this family (94)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6976162B1 (en) 2000-06-28 2005-12-13 Intel Corporation Platform and method for establishing provable identities while maintaining privacy
US7818808B1 (en) 2000-12-27 2010-10-19 Intel Corporation Processor mode for limiting the operation of guest software running on a virtual machine supported by a virtual machine monitor
US8356334B2 (en) * 2001-05-25 2013-01-15 Conexant Systems, Inc. Data network node having enhanced security features
FI115257B (en) * 2001-08-07 2005-03-31 Nokia Corp Method for Processing Information in an Electronic Device, System, Electronic Device, and Processor Block
US7024555B2 (en) 2001-11-01 2006-04-04 Intel Corporation Apparatus and method for unilaterally loading a secure operating system within a multiprocessor environment
GB0129596D0 (en) * 2001-12-11 2002-01-30 Nokia Corp Risk detection
US7313705B2 (en) * 2002-01-22 2007-12-25 Texas Instrument Incorporated Implementation of a secure computing environment by using a secure bootloader, shadow memory, and protected memory
US7631196B2 (en) 2002-02-25 2009-12-08 Intel Corporation Method and apparatus for loading a trustable operating system
US7069442B2 (en) 2002-03-29 2006-06-27 Intel Corporation System and method for execution of a secured environment initialization instruction
US7028149B2 (en) * 2002-03-29 2006-04-11 Intel Corporation System and method for resetting a platform configuration register
US7127548B2 (en) * 2002-04-16 2006-10-24 Intel Corporation Control register access virtualization performance improvement in the virtual-machine architecture
US7139890B2 (en) * 2002-04-30 2006-11-21 Intel Corporation Methods and arrangements to interface memory
US6785790B1 (en) * 2002-05-29 2004-08-31 Advanced Micro Devices, Inc. Method and apparatus for storing and retrieving security attributes
US7124327B2 (en) * 2002-06-29 2006-10-17 Intel Corporation Control over faults occurring during the operation of guest software in the virtual-machine architecture
US6996748B2 (en) * 2002-06-29 2006-02-07 Intel Corporation Handling faults associated with operation of guest software in the virtual-machine architecture
US7165181B2 (en) * 2002-11-27 2007-01-16 Intel Corporation System and method for establishing trust without revealing identity
US7073042B2 (en) * 2002-12-12 2006-07-04 Intel Corporation Reclaiming existing fields in address translation data structures to extend control over memory accesses
US7318235B2 (en) * 2002-12-16 2008-01-08 Intel Corporation Attestation using both fixed token and portable token
US7900017B2 (en) 2002-12-27 2011-03-01 Intel Corporation Mechanism for remapping post virtual machine memory pages
US7480919B2 (en) * 2003-06-24 2009-01-20 Microsoft Corporation Safe exceptions
US8079034B2 (en) * 2003-09-15 2011-12-13 Intel Corporation Optimizing processor-managed resources based on the behavior of a virtual machine monitor
US7424709B2 (en) * 2003-09-15 2008-09-09 Intel Corporation Use of multiple virtual machine monitors to handle privileged events
US7287197B2 (en) * 2003-09-15 2007-10-23 Intel Corporation Vectoring an interrupt or exception upon resuming operation of a virtual machine
US7739521B2 (en) 2003-09-18 2010-06-15 Intel Corporation Method of obscuring cryptographic computations
US7237051B2 (en) * 2003-09-30 2007-06-26 Intel Corporation Mechanism to control hardware interrupt acknowledgement in a virtual machine system
US9614772B1 (en) 2003-10-20 2017-04-04 F5 Networks, Inc. System and method for directing network traffic in tunneling applications
US7076637B2 (en) * 2003-10-29 2006-07-11 Qualcomm Inc. System for providing transitions between operating modes of a device
US8156343B2 (en) * 2003-11-26 2012-04-10 Intel Corporation Accessing private data about the state of a data processing machine from storage that is publicly accessible
US8037314B2 (en) 2003-12-22 2011-10-11 Intel Corporation Replacing blinded authentication authority
US20050133582A1 (en) * 2003-12-22 2005-06-23 Bajikar Sundeep M. Method and apparatus for providing a trusted time stamp in an open platform
US7802085B2 (en) 2004-02-18 2010-09-21 Intel Corporation Apparatus and method for distributing private keys to an entity with minimal secret, unique information
US7620949B2 (en) 2004-03-31 2009-11-17 Intel Corporation Method and apparatus for facilitating recognition of an open event window during operation of guest software in a virtual machine environment
US7840962B2 (en) 2004-09-30 2010-11-23 Intel Corporation System and method for controlling switching between VMM and VM using enabling value of VMM timer indicator and VMM timer value having a specified time
US8146078B2 (en) 2004-10-29 2012-03-27 Intel Corporation Timer offsetting mechanism in a virtual machine environment
US8924728B2 (en) 2004-11-30 2014-12-30 Intel Corporation Apparatus and method for establishing a secure session with a device without exposing privacy-sensitive information
US8533777B2 (en) 2004-12-29 2013-09-10 Intel Corporation Mechanism to determine trust of out-of-band management agents
US7395405B2 (en) 2005-01-28 2008-07-01 Intel Corporation Method and apparatus for supporting address translation in a virtual machine environment
US7552240B2 (en) 2005-05-23 2009-06-23 International Business Machines Corporation Method for user space operations for direct I/O between an application instance and an I/O adapter
US7464189B2 (en) * 2005-05-23 2008-12-09 International Business Machines Corporation System and method for creation/deletion of linear block address table entries for direct I/O
US7502871B2 (en) * 2005-05-23 2009-03-10 International Business Machines Corporation Method for query/modification of linear block address table entries for direct I/O
US20060265525A1 (en) * 2005-05-23 2006-11-23 Boyd William T System and method for processor queue to linear block address translation using protection table control based on a protection domain
US7502872B2 (en) * 2005-05-23 2009-03-10 International Bsuiness Machines Corporation Method for out of user space block mode I/O directly between an application instance and an I/O adapter
US20070005815A1 (en) * 2005-05-23 2007-01-04 Boyd William T System and method for processing block mode I/O operations using a linear block address translation protection table
US8418233B1 (en) * 2005-07-29 2013-04-09 F5 Networks, Inc. Rule based extensible authentication
US8533308B1 (en) 2005-08-12 2013-09-10 F5 Networks, Inc. Network traffic management through protocol-configurable transaction processing
US7657662B2 (en) * 2005-08-31 2010-02-02 International Business Machines Corporation Processing user space operations directly between an application instance and an I/O adapter
US7577761B2 (en) * 2005-08-31 2009-08-18 International Business Machines Corporation Out of user space I/O directly between a host system and a physical adapter using file based linear block address translation
US7500071B2 (en) * 2005-08-31 2009-03-03 International Business Machines Corporation Method for out of user space I/O with server authentication
US7809957B2 (en) 2005-09-29 2010-10-05 Intel Corporation Trusted platform module for generating sealed data
CN101283332A (en) * 2005-10-04 2008-10-08 日本电气株式会社 Information processing device, information processing method, and program
US8565088B1 (en) 2006-02-01 2013-10-22 F5 Networks, Inc. Selectively enabling packet concatenation based on a transaction boundary
US8014530B2 (en) 2006-03-22 2011-09-06 Intel Corporation Method and apparatus for authenticated, recoverable key distribution with no database secrets
US7886099B2 (en) * 2006-06-16 2011-02-08 Superspeed Llc Systems and methods for providing a personal computer with non-volatile system memory
US20080162848A1 (en) * 2006-12-30 2008-07-03 Hewlett-Packard Development Company, L.P. Controlling access to a memory region
US8380987B2 (en) 2007-01-25 2013-02-19 Microsoft Corporation Protection agents and privilege modes
US7765374B2 (en) 2007-01-25 2010-07-27 Microsoft Corporation Protecting operating-system resources
US9106606B1 (en) 2007-02-05 2015-08-11 F5 Networks, Inc. Method, intermediate device and computer program code for maintaining persistency
US20090037678A1 (en) * 2007-07-31 2009-02-05 Giles Chris M Protected portion of partition memory for computer code
US8006055B2 (en) * 2008-03-04 2011-08-23 Microsoft Corporation Fine granularity hierarchiacal memory protection
US9152636B2 (en) * 2008-03-07 2015-10-06 Leadcom Technology Co., Ltd. Content protection system in storage media and method of the same
JP4514066B2 (en) * 2008-04-28 2010-07-28 ルネサスエレクトロニクス株式会社 Data processing apparatus and access control method in data processing apparatus
US9832069B1 (en) 2008-05-30 2017-11-28 F5 Networks, Inc. Persistence based on server response in an IP multimedia subsystem (IMS)
US9130846B1 (en) 2008-08-27 2015-09-08 F5 Networks, Inc. Exposed control components for customizable load balancing and persistence
US8555015B2 (en) * 2008-10-23 2013-10-08 Maxim Integrated Products, Inc. Multi-layer content protecting microcontroller
US8245291B2 (en) * 2008-11-18 2012-08-14 Oracle International Corporation Techniques for enforcing access rights during directory access
US8850410B2 (en) * 2010-01-29 2014-09-30 International Business Machines Corporation System using a unique marker with each software code-block
US8689349B2 (en) * 2010-05-05 2014-04-01 Intel Corporation Information flow tracking and protection
US20120036308A1 (en) * 2010-08-06 2012-02-09 Swanson Robert C Supporting a secure readable memory region for pre-boot and secure mode operations
US9262246B2 (en) 2011-03-31 2016-02-16 Mcafee, Inc. System and method for securing memory and storage of an electronic device with a below-operating system security agent
US8813227B2 (en) 2011-03-29 2014-08-19 Mcafee, Inc. System and method for below-operating system regulation and control of self-modifying code
US9032525B2 (en) 2011-03-29 2015-05-12 Mcafee, Inc. System and method for below-operating system trapping of driver filter attachment
US8966629B2 (en) 2011-03-31 2015-02-24 Mcafee, Inc. System and method for below-operating system trapping of driver loading and unloading
US8925089B2 (en) 2011-03-29 2014-12-30 Mcafee, Inc. System and method for below-operating system modification of malicious code on an electronic device
US8966624B2 (en) 2011-03-31 2015-02-24 Mcafee, Inc. System and method for securing an input/output path of an application against malware with a below-operating system security agent
US9087199B2 (en) 2011-03-31 2015-07-21 Mcafee, Inc. System and method for providing a secured operating system execution environment
US9317690B2 (en) 2011-03-28 2016-04-19 Mcafee, Inc. System and method for firmware based anti-malware security
US8959638B2 (en) 2011-03-29 2015-02-17 Mcafee, Inc. System and method for below-operating system trapping and securing of interdriver communication
US8863283B2 (en) * 2011-03-31 2014-10-14 Mcafee, Inc. System and method for securing access to system calls
US9038176B2 (en) 2011-03-31 2015-05-19 Mcafee, Inc. System and method for below-operating system trapping and securing loading of code into memory
KR101419138B1 (en) 2011-12-30 2014-07-11 에스케이씨앤씨 주식회사 Master trusted service manager
WO2013100419A1 (en) * 2011-12-30 2013-07-04 에스케이씨앤씨 주식회사 System and method for controlling applet access
CN102880815B (en) * 2012-08-21 2016-02-03 上海华御信息技术有限公司 Based on means of defence and the system of application program temporary memory space
US9823869B2 (en) * 2014-01-08 2017-11-21 Nvidia Corporation System and method of protecting data in dynamically-allocated regions of memory
US20160085695A1 (en) 2014-09-24 2016-03-24 Intel Corporation Memory initialization in a protected region
US10754967B1 (en) * 2014-12-15 2020-08-25 Marvell Asia Pte, Ltd. Secure interrupt handling between security zones
US9710404B2 (en) * 2015-03-23 2017-07-18 Intel Corporation Dynamic configuration and peripheral access in a processor
GB2539433B8 (en) * 2015-06-16 2018-02-21 Advanced Risc Mach Ltd Protected exception handling
US10671547B2 (en) 2016-12-19 2020-06-02 Intel Corporation Lightweight trusted tasks
GB2563886B (en) * 2017-06-28 2019-12-25 Advanced Risc Mach Ltd Realm management unit-private memory regions
CN110598405B (en) * 2018-06-12 2022-05-31 杨力祥 Runtime access control method and computing device
US11875168B2 (en) 2020-03-19 2024-01-16 Oracle International Corporation Optimizing execution of foreign method handles on a virtual machine
US11513779B2 (en) 2020-03-19 2022-11-29 Oracle International Corporation Modeling foreign functions using executable references
US11543976B2 (en) * 2020-04-01 2023-01-03 Oracle International Corporation Methods for reducing unsafe memory access when interacting with native libraries
CN112948863B (en) * 2021-03-15 2022-07-29 清华大学 Sensitive data reading method and device, electronic equipment and storage medium

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5457789A (en) * 1989-11-21 1995-10-10 International Business Machines Corporation Method and apparatus for performing memory protection operations in a single instruction multiple data system

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR119649A (en) * 1975-03-24
US4430705A (en) * 1980-05-23 1984-02-07 International Business Machines Corp. Authorization mechanism for establishing addressability to information in another address space
US4366537A (en) * 1980-05-23 1982-12-28 International Business Machines Corp. Authorization mechanism for transfer of program control or data between different address spaces having different storage protect keys
US4500952A (en) * 1980-05-23 1985-02-19 International Business Machines Corporation Mechanism for control of address translation by a program using a plurality of translation tables
US4442484A (en) * 1980-10-14 1984-04-10 Intel Corporation Microprocessor memory management and protection mechanism
US4677546A (en) * 1984-08-17 1987-06-30 Signetics Guarded regions for controlling memory access
US4890223A (en) * 1986-01-15 1989-12-26 Motorola, Inc. Paged memory management unit which evaluates access permissions when creating translator
US5075842A (en) * 1989-12-22 1991-12-24 Intel Corporation Disabling tag bit recognition and allowing privileged operations to occur in an object-oriented memory protection mechanism
US5557771A (en) * 1990-12-01 1996-09-17 Hitachi, Ltd. Data processing system and storage device and auxiliary memory bits for controlling data protection in the storage device
US5627987A (en) * 1991-11-29 1997-05-06 Kabushiki Kaisha Toshiba Memory management and protection system for virtual memory in computer system
US5995750A (en) * 1997-12-16 1999-11-30 Micro Motion, Inc. Memory protection system for a multi-tasking system
US6148384A (en) * 1998-06-02 2000-11-14 Adaptec, Inc. Decoupled serial memory access with passkey protected memory areas
US7124170B1 (en) * 1999-08-20 2006-10-17 Intertrust Technologies Corp. Secure processing unit systems and methods

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5457789A (en) * 1989-11-21 1995-10-10 International Business Machines Corporation Method and apparatus for performing memory protection operations in a single instruction multiple data system

Non-Patent Citations (5)

* Cited by examiner, † Cited by third party
Title
JEAN GAREAU: "Embedded x86 Programming: Protected Mode", EMBEDDED SYSTEMS PROGRAMMING, April 1998 (1998-04-01), pages 80 - 93, XP002242939 *
JOHN SCOTT ROBIN, CYNTHIA E. IRVINE: "Analysis of the Intel Pentium's Ability to Support a Secure Virtual Machine Monitor", 9TH USENIX SECURITY SYMPOSIUM, 14 August 2000 (2000-08-14) - 17 August 2000 (2000-08-17), Denver, Colorado, USA, pages 1 - 17, XP002242938, Retrieved from the Internet <URL:http://www.usenix.org/publications/library/proceedings/sec2000/technical.html> [retrieved on 20030526] *
SKOUSEN A ET AL: "USING A SINGLE ADDRESS SPACE OPERATING SYSTEM FOR DISTRIBUTED COMPUTING AND HIGH PERFORMANCE", 1999 IEEE INTERNATIONAL PERFORMANCE, COMPUTING AND COMMUNICATIONS CONFERENCE. PHOENIX, AZ, FEB. 10 - 12, 1999, IEEE INTERNATIONAL PERFORMANCE, COMPUTING AND COMMUNICATIONS CONFERENCE, NEW YORK, NY: IEEE, US, 10 February 1999 (1999-02-10), pages 8 - 14, XP000859671, ISBN: 0-7803-5259-9 *
TAKAHASHI M ET AL: "Efficient kernel support of fine-grained protection domains for mobile code", DISTRIBUTED COMPUTING SYSTEMS, 1999. PROCEEDINGS. 19TH IEEE INTERNATIONAL CONFERENCE ON AUSTIN, TX, USA 31 MAY-4 JUNE 1999, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, 31 May 1999 (1999-05-31), pages 64 - 73, XP010340561, ISBN: 0-7695-0222-9 *
TAKAHIRO SHINAGAWA, KENJI KONO, AND TAKASHI MASUDA: "Exploiting Segmentation Mechanism for Protecting against Malicious Mobile Code", TECHNICAL REPORT, TR00-02, 17 May 2000 (2000-05-17), Department of Information Science, Faculty of Science, University of Tokyo, pages 1 - 16, XP002242937, Retrieved from the Internet <URL:http://www.is.s.u-tokyo.ac.jp/tech-reports/FILES.html> [retrieved on 20030526] *

Also Published As

Publication number Publication date
WO2002082259A2 (en) 2002-10-17
US7631160B2 (en) 2009-12-08
EP1374064A2 (en) 2004-01-02
KR20030088492A (en) 2003-11-19
AU2002238005A1 (en) 2002-10-21
CN1511286A (en) 2004-07-07
US20020147916A1 (en) 2002-10-10
JP2004530979A (en) 2004-10-07

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