Classifications

• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
  • G06F13/38—Information transfer, e.g. on bus
  • G06F13/40—Bus structure
  • G06F13/4004—Coupling between buses
  • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network

Definitions

• This invention relates to microcomputer systems and, more particularly, to microcomputer systems which include two or more independent microcomputers of different types, each operating with its own software and switchably sharing common system resources.
• These common system resources include, for example, a video display, user input means such as a keyboard or a mouse, a sound port, main memory, and input/ output (I/O) means such as a modem or printer.
• the system according to the invention also provides for a second set of dedicated system resources to the microcomputer system.
• the second set of dedicated system resources includes, for example, a floppy disk drive compatible with either system as well as NUBUS slots and ISA slots.
• This system provides a user with maximum convenience and flexibility. A user can switch the common system resources to either system at will.
• the software and hardware features of either microcomputer system are readily activated with a hardware or software switch. This system minimizes cost by sharing in common as many peripheral devices as possible between the two or more different CPU-based microprocessor systems.
• a microcomputer system for alternatively sharing common system resources between two independent microcomputer systems.
• a first independent microcomputer system is provided which runs software of a first type, for example, Macintosh software.
• a second independent microcomputer system is provided which runs software of a second type, for example, IBM PC software.
• the first independent microcomputer system can be a Macintosh-compatible microcomputer system operating with Macintosh-compatible software with a Macintosh-compatible boot read-only-memory ROM.
• the second independent microcomputer system includes a PC-compatible microcomputer system operating with PC- compatible software.
• Switchable means are provide for sharing a first set of common system resources with the two independent microcomputer systems.
• a second set of system resources is connected to the first and the second independent microcomputer system.
• the switchable means includes either hardware switch means or software switch means.
• the system includes means for connecting the first independent microcomputer system to the first set of common system resources and for booting up the first independent microcomputer system with the first set of common system resources connected thereto.
• the system also includes means for connecting the second independent microcomputer system to the first set of common system resources and for booting up the second independent microcomputer system with the second set of common system resources connected thereto.
• the system includes means for maintaining operation of the first and the second independent microcomputer systems when the common system resources are not connected respectively thereto.
• the switchable means includes a number of ports and related circuitry for sharing a first set of common system resources.
• the switchable means includes a video port for connection to a video display and switch means for selectably connecting a respective video signal either from the first independent microcomputer system or from the second independent microcomputer system to the video port.
• the switchable means includes: an audio port and switch means for selectably connecting a respective audio signal from the first independent microcomputer system or from the second independent microcomputer system to the audio port.
• One or more user input ports are provided with switch means for selectably connecting a respective user input signal from the user input port to either the first independent microcomputer system or to the second independent microcomputer system.
• One of the user input port s can include a keyboard port or a mouse port.
• the switchable means includes one or more serial communication ports, and a transceiver for receiving serial communication signals from either the first independent microcomputer system or from the second independent microcomputer system.
• the serial communication ports includes a modem port or a printer port.
• the switchable means can also include a main memory port.
• the means for connecting a second set of system resources to the first and the second independent microcomputer system includes one or more connector slots for connecting respective plug-in cards for the first and the second independent microcomputer systems, including connector slots for a NUBUS bus system or for an ISA bus system.
• the means for connecting a second set of system resources to the first and the second independent microcomputer system includes terminals for one or more floppy disk drives compatible with the first and the second independent microcomputer systems.
• a method for alternatively sharing common system resources with two independent microcomputer systems.
• the method includes the steps of: connecting a first microcomputer system to the common system resources using switchable connection means; booting up the first microcomputer system with the common system resources being connected thereto; removing the common system resources from the first microcomputer system; maintaining the first microcomputer system operational with the common system resources being removed therefrom; connecting a second microcomputer system to the common system resources using switchable connection means; booting up the second microcomputer system with the common system resources being connected thereto; maintaining the second microcomputer system operational with the common system resources being removed therefrom; and activating the switchable connection means to selectably connect the common system resources to either the first microcomputer system or to the second microcomputer system.
• FIGURE 1 is an overall system block diagram showing two independent microcomputer systems and a switching module for switchably sharing common system resources and for connecting dedicated resources to a particular microcomputer.
• FIGURE 2 shows a more detailed block diagram of a switching module.
• FIGURE 3 shows a block diagram of an exemplary first independent microcomputer system, such as a Macintosh- compatible system.
• FIGURE 4 shows a block diagram of an exemplary second independent microcomputer system, such as a PC-compatible system.
• FIGURE 5 shows a simplified flow chart for booting one of the independent microcomputer systems.
• FIGURE 6 shows a simplified flow chart for handling system operation such as switch interrupts and peripheral requests.
• FIGURE 1 shows a microcomputer system 10 according to the invention for alternatively sharing common system resources between two or more independently operating microcomputer systems. For illustration purposes two particular microcomputer systems are shown.
• a first independent microcomputer system 12 such a system based on a Motorola 68030 microprocessor system and a second independent microcomputer system 14, such as a system based on an Intel 80486 microprocessor is also shown.
• a switching/interconnection module 16 functions as an interface circuit between the two independent microcomputer systems and a number of I/O ports 18, 20, 22, 24, 26.
• Port 18 is connected to external peripheral devices, such as, for example, a printer or a modem.
• Port 20 is connected to external system components, such as, for example, a main memory.
• Port 22 provides an external port, such as for a NUBUS or ISA bus.
• Port 24 is connected to an external display devices, such as, for example, a display screen.
• Port 26 is connected to external user input device, such as, for example, a keyboard and/or a mouse.
• a bridge connector M 30 provides an interface between an interconnection bus 32 for the 68030-based system 12 and an interconnection bus 34 connected to the switching/interconnection module 16.
• a bridge connector P 40 provides an interface between an interconnection bus 42 for the 80486-based system 14 and an interconnection bus 44 for the switching/interconnection module 16.
• FIGURE 2 shows a more detailed block diagram of the switching/interconnection module 16.
• a number of MAC- compatible busses run from the bridge connector M to various elements of the bridge connector M.
• the bridge connector M provides a direct connection to NUBUS slots 50 for a MAC- compatible system.
• a serial communication controller bus A 52 is connected to a port of a transceiver circuit 54.
• a serial communication controller bus B 56 is switchably connected through a two-input multiplexer 58 to another port of the transceiver circuit 54.
• the other input port of the two-input multiplexer 58 is connected to a SERIAL COM2 bus 60 which runs to the bridge connector P for the 80486-based system 14.
• a control terminal 62 for the two-input multiplexer 58 is operated with a manually-operated mechanical switch located, for example on the outside of the enclosure for the system 10, where the enclosure is, for example, a conventional PC mini-tower.
• the two-input multiplexer 58 can also be operated with an electro ⁇ mechanical or a software switch, as desired.
• the other multiplexers which operate as selection switches and the analog switches, as described herein below, are operated, either manually, electromechanically, or under software control.
• the transceiver circuit 54 has output signal lines connected, for example, to a modem port 64 or a printer port 66, as illustrated.
• a low impedance analog switch 70 with a control terminal 72 is connected to a Mac keyboard/ mouse bus 74 connected to the bridge connector M and a PC keyboard/mouse bus 76 connected to the bridge connector P.
• the low impedance analog switch 70 has output buses connected respectively to a mouse port 78 and a keyboard port 80.
• a digital-to-analog (D/A) converter and amplifier unit 82 has a sound port 84 at its output terminal. Its input terminal is connected to the output terminal of a two-input multiplexer 86 which has a control terminal 88. The input terminals of the two- input multiplexer 86 are connected to a Mac sound bus 90 and a PC sound bus 92.
• D/A digital-to-analog
• ISA BUS slots 94 are connected through an ISA bus 94 to the bridge connector P for the 80486-based system 14.
• a low impedance analog switch 100 with a control terminal 102 has its output terminal connected to a video port 104.
• the input terminals of the switch 100 are connected to a Mac video bus 106 and a PC video bus 108.
• the PC video bus 108 connects to the output terminals of a PC RAMDAC 110.
• PC video information is sent from the PC system on the ISA bus 94 to a video controller 112.
• the video controller 112 is connected through a VGA_RAM control bus 114 and a data/address bus 116 to a video RAM 118 for the PC system.
• the video controller 112 is connected through a VGA_RAMDAC control bus 120 and a VGA pixel bus 122 to the RAMDAC 110.
• a floppy disk drive A terminal 130 and a floppy disk drive B terminal 132 are connected through a floppy disk bus 134 to the bridge connector P, as illustrated.
• FIGURE 3 shows a block diagram of the illustrative MAC- compatible 68030-based microcomputer system 12.
• the system includes as a CPU 150 a Motorola 68030; 32-bit internal architecture running at a 33 MHz clock speed with data, address, and control buses as illustrated in the Figure.
• An optional floating-point co-processor 152 includes Motorola 68882 numeric coprocessor operating at 33 MHz.
• Main memory for this Macintosh-compatible processor includes a DRAM 154, which is expandable from 2 MBytes to 128 MBytes using industry standard 30-pin SIMM modules running at 70 nS speed or better and supporting 256KB, 1MB, 4MB, and 16 MBytes. 2M Bits of ROM are supplied.
• a 1 MByte DRAM video memory 156 is supplied with Fast Page capability.
• Internal storage which is shared by both microcomputer systems 12, 14 included a system included in the I/O controller unit 158 for running a 3 1/2" FlexDisk drive, which can run standard Apple 800K or 1.4M disks or PC 720K or 1.44M floppy disks.
• a SCSI/SCC controller unit 160 provides a 50-pin header SCSI external SCSI connector and an internal SCSI bus 162.
• One floppy disk drive is connected through a bus 162.
• external connections shared by both processors include an IBM Ps/2 compatible keyboard connector at port 80 and an IBM Ps/2 compatible mouse connector at port 78.
• Video port 104 includes a D-type 15-pin video connector for PC
• VGA which can connect to a Macintosh-compatible monitor with an adapter cable.
• Macintosh compatible pinout SCSI connector a modem port, and an RS422 serial port are provided.
• Other system 12 units include a boot ROM 164, a bus controller 166, a memory controllers A & B, 168, 170, the I/O controller 158, a CRT controller 172, a RAMDAC 174, a keyboard/mouse controller 176, the SCSI controller 160, and a real time clock unit 178.
• FIGURE 4 shows a block diagram of the 80486-based microcomputer system 14.
• Main memory 182 includes a DRAM, expandable from 1 MBytes to 32 MBytes with Fast Page capability and page mode interleave.
• a cache memory is provided with write back or write through architecture.
• Video memory includes 1 MBytes DRAM video memory with Fast Page. Shared by both processors are the 3 1/2" FlexDisk drive which can run standard Apple 800K or 1.4M or PC 720K or 1.44M floppy disks. For the PC processor and IDE connector and one 5 1/4" or 3 1/2" disk drive car available.
• external connectors shared by both processors 12, 14 includes the IBM Ps/2 compatible keyboard connector at port 80, the IBM Ps/2 compatible mouse connector at port 78, and the D-type 15-pin video connector for PC VGA at port 104.
• a 9-pin serial port is provided on COM 2 and a 25-pin parallel port LPT 1 is provided.
• Two 16-bit ISA slots 94 are provided.
• Other system units include a CPU/CACHE/DRAM/AT BUS controller 184, an instruction processor controller IPC unit 186, an IDE/floppy disk controller and serial/parallel converter 188, a keyboard/mouse controller 190, an EPROM BIOS unit 192 and the ISA bus 194.
• FIGURE 5 shows a simplified flow chart 200 for checking the availability of common peripheral devices or functions, such as SCSI, for one of the independent microcomputer systems at initial boot time.
• Block 202 indicates that the boot routine has been called for.
• Decision block 202 determines whether the required common peripheral devices or function is available. If not, the system will loop through path 206 until availability is obtained. If availability is obtained, the system will follow path 208 to the block 210 which indicates that booting will continue.
• the software for each system is modified to enable the systems, once booted, to continue to operate, even when certain system resources, such as a screen or keyboard are not connected.
• FIGURE 6 shows a simplified flow chart 220 for handling system operations such as switch interrupts and peripheral requests.
• Entry point 220 in entered when a hardware (or software) switch is activated.
• Block 222 causes the commonly shared peripherals, main memory, or SCSI operations to be handled properly to complete operations for one microcomputer system and to start operations for the other system.
• block 224 indicates that the system moves to handle the other microcomputer system requirements.
• Figure 6 also shows a simplified flow chart for handling peripheral requests, which are indicated by the entry point 226.
• the availability of the peripheral is monitored by the decision block. If the common peripheral device is not available, path 232 indicates that the system will loop until the common peripheral device is available. Path 232 indicates that when the common peripheral device is available, the system will continue as indicated by block 234.

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Cited By (9)

Citations (4)

• 1993
  • 1993-10-27 AU AU54544/94A patent/AU5454494A/en not_active Abandoned
  • 1993-10-27 WO PCT/US1993/010351 patent/WO1994019749A1/en active Application Filing

Patent Citations (4)

Non-Patent Citations (1)

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