US6769063B1 - Data converter and recording medium on which program for executing data conversion is recorded - Google Patents

Data converter and recording medium on which program for executing data conversion is recorded Download PDF

Info

Publication number
US6769063B1
US6769063B1 US09/600,955 US60095500A US6769063B1 US 6769063 B1 US6769063 B1 US 6769063B1 US 60095500 A US60095500 A US 60095500A US 6769063 B1 US6769063 B1 US 6769063B1
Authority
US
United States
Prior art keywords
data
key
transformation
mid
nonlinear
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
US09/600,955
Inventor
Masayuki Kanda
Youichi Takashima
Kazumaro Aoki
Hiroki Ueda
Kazuo Ohta
Tsutomu Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP10147479A external-priority patent/JP2934431B1/en
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Assigned to NIPPON TELEGRAPH AND TELEPHONE CORPORATION reassignment NIPPON TELEGRAPH AND TELEPHONE CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: AOKI, KAZUMARO, KANDA, MASAYUKI, OHTA, KAZUUO, TAKASHIMA, YOUICHI, TATSUMOTO, TSUTOMU, UEDA, HIROKI
Application granted granted Critical
Publication of US6769063B1 publication Critical patent/US6769063B1/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/002Countermeasures against attacks on cryptographic mechanisms
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • H04L9/0625Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation with splitting of the data block into left and right halves, e.g. Feistel based algorithms, DES, FEAL, IDEA or KASUMI
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12Details relating to cryptographic hardware or logic circuitry
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/24Key scheduling, i.e. generating round keys or sub-keys for block encryption

Definitions

  • the present invention relates to a transformation device that is used in a cryptographic device for concealing data in data communication or storage and, more particularly, to a data transformation device suitable for use in an encryption device of a secret-key encryption algorithm which encrypts or decrypts data blocks using a secret key, and a recording medium on which there is recorded a program for execution by the data transformation device.
  • a block cipher is used according to which data for encryption is split into blocks of a suitable length and encrypted for each block.
  • the block cipher comprises a data diffusion part which randomizes input data to be encrypted, and a key scheduling part which is supplied with a secret common key (hereinafter referred to as a master key) input to the encryption device and generates a sequence of subkeys for use by the data diffusion part.
  • a typical secret-key encryption algorithm which is used in the data transformation device to conceal data, is DES (Data Encryption Standard) that was FIPS-approved algorithm for encryption.
  • FIG. 1 illustrates the functional configuration of DES.
  • DES uses a 64-bit secret key (8 bits being used for parity), and encrypts or decrypts data in blocks of 64 bits.
  • the encryption process is executed in a data diffusion part 10 , which begins with initial permutation of 64 bits of a plaintext M in an initial permutation part 11 , followed by splitting the permuted data into two pieces of 32-bit block data L 0 and R 0 .
  • a function operation part referred to also as a round function
  • R 1 L 0 ⁇ f ( R 0 , k 0 )
  • a 0-th round processing part 14 0 comprises the function operation part 12 and the XOR circuit 13 and swaps the two pieces of block data to provide the two pieces of output block data L 1 and R 1 ; similar round processing parts 14 1 to 14 15 are provided in cascade.
  • the decryption process can be executed following the same procedure as that for the encryption process except inputting subkeys k 0 , k 1 , . . . , k 14 , k 15 to the function f (the function operation part 12 ) in the order k 15 , k 14 , . . . , k 1 , k 0 which is reverse to that in the encryption process.
  • the outputs L 16 and R 16 from the final round processing part 14 15 are further swapped as depicted, and in the decryption process the ciphertext is input to the initial permutation part 11 for execution of the process of FIG. 1, by which the plaintext is provided intact at the output of the final permutation part 15 .
  • an expanded key generation part 21 splits a master key of 64 bits, except 8 bits used for parity, into two pieces of 28-bit right and left key data; then performs 16-round swapping of the two pieces of 28-bit right and left key data; and performs reduced permutation of the permuted right and left data (a total of 56 bits) provided from the respective rounds to generate 16 48-bits subkeys k 0 , k 1 , . . . , k 14 , k 15 which are provided to the corresponding round processing parts of the data diffusion part 10 .
  • the processing in the function operation part 12 is performed as depicted in FIG. 2 .
  • the 32-bit block data R i is transformed to 48-bit data E(R i ) in an expanded permutation part 17 .
  • This output data and the subkey k i are exclusive ORed in an XOR circuit 18 , whose output is transformed to 48-bit data E(R i ) ⁇ k i , which is then split to eight pieces of 6-bit sub-block data.
  • the eight pieces of sub-block data are input to different S-boxes S 0 to S 7 to derive therefrom a 4-bit output, respectively.
  • differential cryptanalysis aims to obtain the subkey k 15 in the final round processing part 14 15 by applying to the following equations two sets of plaintext-ciphertext pair that an attacker possesses.
  • (L i , R i ) and (L* i , R* i ) represent input data into the round processing part 14 i for first and second plaintexts respectively.
  • the following equations hold.
  • R 16 L 15 ⁇ f ( R 15 , k 15 )
  • R* 16 L* 15 ⁇ f ( R* 15 , k 15 )
  • ⁇ R 16 ⁇ L 15 ⁇ f ( L 16 , k 15 ) ⁇ f ( L 16 ⁇ L 16 ,k 15 ).
  • Linear cryptanalysis aims to obtain subkeys by constructing the following linear approximate equation and using the maximum likelihood method with sets of known plaintext-ciphertext pair possessed by an attacker.
  • ⁇ (X) represents the vector that chooses a particular bit position of X, and it is called a mask value.
  • the role of the linear approximation expression is to approximately replace the cryptographic algorithm with a linear expression and separate it into a part concerning the set of plaintext-ciphertext pairs and a part concerning the subkeys. That is, in the set of plaintext-ciphertext pairs, the all exclusive Ors between the values at particular bit positions of the plaintext and those of the ciphertext take a fixed value, which indicates that it equals the exclusive OR of the values at particular positions of the subkeys. This means that the attacker gets information
  • (L 0 , R 0 ) and (L 16 , R 16 ) are the plaintext and the ciphertext, respectively, and hence they are known. For this reason, if the attacker can correctly obtain ⁇ (L 0 , R 0 ), ⁇ (L 16 , R 16 ) and ⁇ (k 0 , k 1 , . . . , k 15 ), then he can obtain (k 0 , k 1 , . . . , k 15 ) ⁇ (k 0 , k 1 , . . . , k 15 ) (one bit).
  • a linear representation of each round with the input and output mask values can be made with a probability p i , and by concatenating the linear representations of the respective rounds, ⁇ (L 0 , R 0 ), ⁇ (L 16 , R 16 )and ⁇ (k 0 , k 1 , . . . , k 15 ) are obtained wit the following probability:
  • the probability P needs only to be reduced to be sufficiently small.
  • a wide variety of proposals have been made to lessen the probability P, and the easiest way to provide increased security in the conventional cryptosystems is to increase the number of rounds.
  • Triple-DES with three DESs concatenated is an algorithm that essentially increases the number of rounds from 16 to 48, and it provides a far smaller probability P than does DES.
  • the encryption speed is reduced down to 1 ⁇ 3. That is, since the encryption speed of the present DES is about 10 Mbps on the Pentium PC class, the encryption speed of Triple-DES goes down to around 3.5 Mbps.
  • networks and computers are becoming increasingly faster year by year, and hence there is also a demand for data transformation devices that keep up with such speedups. With conventional data transformation devices, it is extremely difficult, therefore, to simultaneously meet the requirements of security and speedup.
  • the key processing parts 21 j each have an exclusive OR part 23 j , which calculates the exclusive OR of the left input key data to the key processing part 21 j ⁇ 1 of the preceding round and the left output key data therefrom and provides the calculated data to the key diffusion part 22 j .
  • the left input key data of the key processing part 21 j is diffused by the output from the exclusive OR part 23 j in the key diffusion part 22 j , from which the diffused data is output as right key data for input to the next round, and the right input key data of the key processing part 21 j is output as left key data for input to the next round.
  • the 64-bit main key is split into two pieces of 32-bit right and left key data, then in the first-round key processing part 21 0 the left key data is diffused by the right key data in the key difflusion part 22 0 to obtain diffused left key data, and this diffused left key data and the right key data are interchanged and provided as right and left key data next to the key processing part 21 1 .
  • the outputs from the key diffusion parts 22 0 to 22 N/2 ⁇ 1 of the key processing parts 21 0 to 21 N/2 ⁇ 1 are applied as subkeys k 0 to k N ⁇ 1 to the corresponding round processing parts 14 0 to 14 N ⁇ 1 of the data diffusion part 10 depicted in FIG. 1 .
  • each key diffusion part 22 j is a function for generating a pair of key data (subkeys Q 2j , Q 2j+1 ) from two pieces of input data.
  • the other input data can be found out, if it is assumed that three pairs of subkeys (Q 2j ⁇ 2 and Q 2j ⁇ 1 ), (Q 2j and Q 2j+1 ), (Q 2j+1 and Q 2j+3 ) are known, since the output (subkeys Q 2j+2 and Q 2j+3 ) from the (j+1)-th key diffusion part 22 j+1 and the one input data (subkeys Q 2j ⁇ 2 and Q 2j ⁇ 1 ) thereto are known, the other input data (i.e., the output data from the exclusive OR part 23 j+1 ) can be obtained; and it is possible to derive, from the thus obtained data and the subkeys Q 2j and Q 2j+1 which constitute the
  • subkeys k N and k N ⁇ 1 are easy to obtain by differential and linear cryptanalysis.
  • a first object of the present invention is to provide a data transformation device in which the round function f (the function operation part) is so configured as to simultaneously meet the requirements of security and speedup to thereby ensure security and permit fast encryption processing without involving a substantial increases in the number of rounds, and a recording medium having recorded thereon a program for implementing the data transformation.
  • a second object of the present invention is to implement a key scheduling part which does not allow ease in determining other subkeys and the master key by a mere analysis of the key scheduling part even if some of the subkeys are known.
  • a nonlinear function part comprises: a first key-dependent linear transformation part which linearly transforms input data of the nonlinear function part based on first key data stored in a key storage part; a splitting part which splits the output data of the first key-dependent linear transformation part into n pieces of subdata; first nonlinear transformation parts which nonlinearly transform these pieces of subdata, respectively; a second key-dependent linear transformation part which linearly transforms respective pieces of output subdata of the first nonlinear transformation parts based on second key data; second nonlinear transformation parts which nonlinearly transform respective pieces of output subdata of the second key-dependent linear transformation part; and a combining part which combines output subblocks of the second nonlinear transformation part into output data of the nonlinear function part; and the second key-dependent linear transformation part contains a linear transformation part which performs exclusive ORing of its inputs which is defined by an n ⁇ n matrix.
  • the differential probability/linear probability in the first and second nonlinear transformation parts is p ( ⁇ 1)
  • the differential probability/linear probability of approximating each round is p i ⁇ p 2 (when the input difference to the function f(the nonlinear function part) is not 0 in the case of differential cryptanalysis, and when the output mask value from the function is not 0 in the case of linear cryptanalysis).
  • the function f is objective, if the number of rounds of the cryptographic device is set at 3r, then the probability of the cipher becomes P ⁇ p i 2r ⁇ p 4r .
  • first and second nonlinear transformation parts are arranged so that their processing can be performed completely in parallel—this contributes to speedup.
  • the key scheduling part is provided with: a G-function parts which perform the same function as that of the key diffusion part (the function f k ), L components which are output from the G-function parts being once stored in a storage part; and an H-function part which reads out a required number of L components from the storage part and generates subkeys by extracting the respective L components as uniformly as possible. Furthermore, in the H-function part partial information, which is used as subkeys, is extracted from the L components which are outputs from the G-function parts, then the extracted information is stored in a storage part, and the subkeys are generated by extracting the partial information from the required number of L components.
  • FIG. 1 is a diagram depicting the functional configuration of a conventional DES cryptographic device.
  • FIG. 2 is a diagram depicting a concrete functional configuration of a function operation part 12 in FIG. 1 .
  • FIG. 3 is a diagram depicting an example of an expanded key generation part 21 in FIG. 2 .
  • FIG. 4 is a diagram illustrating the functional configuration of the first embodiment of the present invention.
  • FIG. 5 is a diagram showing in detail an example of the functional configuration of a nonlinear function part 304 in the first embodiment.
  • FIG. 6 is a diagram showing a basic configuration of a nonlinear function part for determining an optimal linear transformation part in FIG. 5 .
  • FIG. 7 is a diagram depicting a concrete example of the second key-dependent linear transformation part 344 in FIG. 5 .
  • FIG. 8A is a diagram depicting an equivalent functional configuration of a nonlinear transformation part 343 0 ′ in the second embodiment.
  • FIG. 8B is a diagram depicting a equivalent functional configuration of a nonlinear transformation part 343 1 ′ in the second embodiment.
  • FIG. 8C is a diagram depicting an equivalent functional configuration of a nonlinear transformation part 343 2 ′ in the second embodiment.
  • FIG. 8D is a diagram depicting an equivalent functional configuration of a nonlinear transformation part 343 2 ′ in the second embodiment.
  • FIG. 9 is a diagram showing the functional configuration of a second key-dependent linear transformation part 344 in the second embodiment.
  • FIG. 10 is a diagrqm showing the functional configuration of a nonlinear function part 343 0 ( 345 0 ) in the third embodiment.
  • FIG. 11 is a flowchart showing the procedure for implementing a data transformation by a computer.
  • FIG. 12 is a flowchart showing in detail the procedure of step S 3 in FIG. 11 .
  • FIG. 13 is a diagram depicting the functional configuration of the fourth embodiment of the present invention.
  • FIG. 14 is a diagram depicting the functional configuration of a nonlinear function part 304 in FIG. 13 .
  • FIG. 15A is a diagram depicting a linear transformation part 334 A of a limited structure intended to reduce the computational complexity involved in search.
  • FIG. 15B is a diagram depicting an example of configuration of one transformation box in FIG. 15 A.
  • FIG. 16 is a diagram depicting an example of the configuration of a linear transformation part 344 A determined by the search algorithm.
  • FIG. 17 is a diagram depicting an example of the functional configuration of a second key-dependent linear transformation part 344 in FIG. 14 in the fourth embodiment.
  • FIG. 18 is a diagram depicting another example of the functional configuration of a second key-dependent linear transformation part 344 in FIG. 14 in the fourth embodiment.
  • FIG. 19 is a diagram depicting still another example of the functional configuration of a second key-dependent linear transformation part 344 in FIG. 14 in the fourth embodiment.
  • FIG. 20A is a diagram illustrating the functional configuration of a nonlinear transformation part 343 0 ′ in the fifth embodiment.
  • FIG. 20B is a diagram illustrating the functional configuration of a nonlinear transformation part 343 1 ′.
  • FIG. 20C is a diagram illustrating the functional configuration of a nonlinear transformation part 343 7 ′.
  • FIG. 21 is a diagram showing the functional configuration of a second key-dependent linear transformation part 344 in the fifth embodiment.
  • FIG. 22 is a diagram showing a configuration for executing a data processing program recorded on a recording medium.
  • FIG. 23A is a block diagram depicting the basic functional configuration of a key generation part according to the present invention.
  • FIG. 23B is a block diagram depicting the basic functional configuration of another key generation part according to the present invention.
  • FIG. 24 is a block diagram depicting an example of the functional configuration of an intermediate key generation part 220 in FIGS. 23A or 23 B.
  • FIG. 25 is a block diagram depicting the functional configuration of a G-functional part in FIG. 24 when the present invention is applied to a key scheduling part in FIG. 3 .
  • FIG. 26 is a block diagram depicting the functional configuration of a subkey generation part 240 in FIG. 23A when the present invention is applied to a key scheduling part in FIG. 3 .
  • FIG. 27 is a block diagram depicting an example of the functional configuration of a subkey generation part 250 in FIG. 23B when the present invention is applied to a key scheduling part in FIG. 3 (In this embodiment the subkey generation part contains an H-function part equipped with a bit extraction function).
  • FIG. 28 is a block diagram depicting the functional configuration of the G-function part 22 designed for the application of the present invention to a Feistel cipher which uses 128 bits as one block.
  • FIG. 4 illustrates the functional configuration for an encryption process in the data transformation device according to an embodiment of the present invention.
  • the data transformation device comprises a data diffusion part 10 and a key scheduling part 20 .
  • Input data M which corresponds to a plaintext, is entered into the cryptographic device via an input part 301 .
  • the key scheduling part 20 comprises a key input part 320 , a expanded key generation part 321 and a key storage part 322 .
  • the expanded key generation part 321 Based on input data (a master key K) from the key input part 320 , the expanded key generation part 321 generates plural pieces of key data (subkeys)
  • the input data M is transformed in a key-dependent initial transformation part 302 with the key data fk stored in the key storage part 322 , thereafter being split in an initial splitting part 303 into two pieces of left and right block data L 0 and R 0 .
  • 64-bit data is split into two pieces of 32-bit block data L 0 and R 0 .
  • the key-dependent initial transformation part 302 performs a linear transformation such as exclusive ORing of the key data fk and the input data M or bit rotation of the input data M by the key data fk, or nonlinear transformation by a combination of multiplications.
  • the right block data R 0 is provided to the nonlinear function part 304 which is characteristic of the present invention, together with the key data k 00 , k 01 and k 02 stored in the key storage part 322 , and in the nonlinear function part 304 the right block data is nonlinearly transformed to data Y 0 .
  • the data Y 0 and the left block data L 0 are transformed to data L 0 * through a linear operation in the linear operation part 305 .
  • the data L 0 * and the data R 0 are swapped in the swapping part 306 to provide L 1 ⁇ R 0 , R 1 ⁇ L 0 *; and these pieces of data L 1 and R 1 are input to the next first round processing part 38 1 .
  • the data Y i and the data L i are transformed to data L i * by a linear operation in the linear operation part 305 .
  • the data L i * and the data R i are swapped in data position in the swapping part 306 , that is, L i+1 ⁇ R i , R i+1 ⁇ L i *.
  • the linear operation part 305 is to perform, for instance, an exclusive OR operation.
  • Letting N represent the repeat count (the number of rounds) suitable to provide security of a data transformation device for encryption
  • two pieces of left and right data L N and R N are obtained as the result of such repeated processing by the round processing parts 38 0 to 38 N ⁇ 1 .
  • These pieces of data L N and R N are combined into a single piece of block data in a final combining part 307 ; for example, the two pieces of 32-bit data L N and R N are combined to 64-bit data.
  • the thus combined data is transformed in a final linear transformation part 308 using the key data ek stored in the key storage part 322 , and output data C is provided as a ciphertext from an output part 309 .
  • the plaintext M can be derived from the ciphertext C by reversing the encryption procedure.
  • the key-dependent final transformation part 308 is one that performs a transformation inverse to that of the key-dependent initial transformation part 302
  • the decryption can be done by inputting ciphertext data in place of the input data in FIG. 4 and then inputting the key data in a sequential order reverse to that in FIG. 4, that is, ek, k (N ⁇ 1)0 , k (N ⁇ 1)1 , k (N ⁇ 1)2 , . . . , k 10 , k 11 , k 12 , k 00 , k 01 , k 02 , fk.
  • FIG. 5 is a diagrammatic showing of the internal functional configuration of the nonlinear function part 304 .
  • the input block data R i to the i-th round processing part 38 i constitutes input data to the nonlinear function part 304 , together with the key data k i0 , k i1 , k i2 stored in the key storage part 322 .
  • the thus transformed data R i * is split into four pieces of, for instance, 8-bit data in 0 , in 1 , in 2 and in 3 in a splitting part 342 .
  • the four pieces of data in 0 , in 1 , in 2 and in 3 are nonlinearly transformed to four pieces of data mid 00 , mid 01 , mid 02 and mid 03 in nonlinear transformation parts 343 0 , 343 1 , 343 2 and 343 3 , respectively, from which they are input to a second key-dependent linear transformation part 344 .
  • the second key-dependent linear transformation part 344 performs linear transformation (XORing) among the pieces of input data mid 00 , mid 01 , mid 02 and mid 03 from four routes to provide new data of four routes, and further performs linear transformation (XORing) among these pieces of data of the four routes with four pieces of the key data k i1 to provide output data mid 10 , mid 11 , mid 12 and mid 13 of the four routes.
  • the four pieces of data are input to nonlinear transformation parts 345 0 , 345 1 , 345 2 and 345 3 , wherein they are transformed to data out 0 , out 1 , out 2 and out 3 , respectively.
  • the above-mentioned second key-dependent linear transformation part 344 is configured to perform an exclusive OR operation of data between data processing routes 30 0 , 30 1 , 30 2 and 30 3 provided corresponding to the pieces of data mid 00 , mid 01 , mid 02 and mid 03 , respectively, through the use of an algorithm according to the present invention, thereby providing increased security without increasing the number of rounds of the data transformation device depicted in FIG. 4 .
  • the security of he data transformation device of FIG. 4 against differential cryptanalysis and linear cryptanalysis is dependent on the configuration of the nonlinear function part 304 of each round; in particular, when the nonlinear function part 304 in FIG. 5 has such a basic configuration as shown in FIG.
  • the security depends on a first nonlinear transformation part 343 composed of n nonlinear transformation parts (S-boxes) with m-bit input data, a linear transformation part 344 A for linearly transforming the n outputs and a second nonlinear transformation part 345 composed of n nonlinear transformation parts (S-boxes) for nonlinearly transforming the n m-bit outputs, respectively. It is particularly important how an optimal linear transformation part 344 A is constructed which is secure against differential and linear cryptanalysis.
  • the linear transformation part 344 A is represented as an n ⁇ n matrix P over ⁇ 0, 1 ⁇ , and the optimal linear transformation part 344 A is constructed by determining elements of the matrix P in such a manner as to minimize the maximum differential and linear characteristic probabilities p, q.
  • a linear transformation part using the subkey k i1 which is contained in the second key-dependent linear transformation part 344 , is added as a key-dependent transformation part 344 B to the linear transformation part 344 A determined by the matrix P as depicted in FIG. 7 .
  • the linear transformation part 344 A in FIG. 6 is represented as the n ⁇ n matrix P over ⁇ 0. 1 ⁇ as referred to above.
  • the linear transformation is made in units of bytes, and can be efficiently implemented on any platforms where the word width is 8-bit or more.
  • the resistance of the round function to differential and linear cryptanalysis can be determined by the smallest numbers n d , n 1 of active s-boxes, and these values are those determined at the time of determining the matrix P (see Appendix).
  • an s-box whose input difference value ⁇ x is nonzero is called an active s-box
  • an s-box whose output mask value ⁇ y is nonzero is called an active box.
  • the matrix P represents only the relationship between input and output data of the linear transformation part 344 A and does not define its concrete construction. That is, if it is common in the matrix P which represents the relationship between their input and output data, linear transformation parts can be considered to have the same characteristic regardless of their individual constructions. Accordingly, in the following description, the matrix P is determined first which provides high invulnerability against differential and linear cryptanalysis and good avalanche effect, followed by determining the construction of the linear transformation part 344 A. This method is more effective in finding out a linear transformation part 344 A of an optimal characteristic than a method of checking individual constructions of linear transformation parts to see if they have the optical characteristic.
  • the elements of the n ⁇ n matrix P are determined by the following search algorithm taking the differential characteristic into account.
  • Step 1 Set a security threshold T (where T is an integer such that 2 ⁇ T ⁇ n).
  • Step 2 Prepare a set C of column vectors whose Hamming weights are equal to or larger than T ⁇ 1. More specifically, prepare n or more n-dimensional column vectors which have T ⁇ 1 or more elements “1.”
  • Step 3 Select a subset P c of n column vectors from the set C. Repeat the following steps until all subsets have been checked.
  • Step 3-1 Compute n d for the subset P c of n column vectors. This is represented as n d (P c ).
  • Step 3-2 If n d (P c ) ⁇ T, then accept a matrix P c consisting of the n column vectors as a candidate matrix.
  • Step 4 Output matrices P and a value n d (P) that yields the maximum value of n d among all candidate matrices.
  • n d is equal to or larger than T.
  • a matrix with n d (P c ) ⁇ T obtained by performing steps up to 3-2 may be used as the desired matrix P.
  • the matrix Pc composed of n vectors whose Hamming weights are equal to or larger than T ⁇ 1 selected in step 2 after step 1 may be used as the matrix P.
  • the input mask values of the linear transformation part 344 A can be represented by exclusive ORs of its output mask values, and hence they can be expressed by a certain matrix as is the case with differential characteristic.
  • Theorem 1 Assume that an n ⁇ n matrix P over ⁇ 0, 1 ⁇ is given for the linear transformation part 344 A. At this time, the relationship between input and output difference values ⁇ z and ⁇ z′ of the linear transformation part 344 A (a difference path) is given by the matrix P, and the relationship between input and output mask values ⁇ z and ⁇ z′ (a mask value path) is given by a transposed matrix T P. That is,
  • the minimum number n d of active s-boxes in the difference value path using the matrix P is equal to the minimum number n 1 of active s-boxes in the mask value path using the transposed matrix T P.
  • n 1 is also equal to or larger than T when the candidate matrices by the search algorithm are adopted.
  • the matrix P E for the difference value path and the matrix T P E for the mask value path bear the following relationship.
  • P E [ 0 1 1 1 1 0 1 1 1 1 1 0 1 1 1 ]
  • P E T [ 0 1 1 1 1 0 1 1 1 1 1 1 1 0 1 ] ( 6 )
  • Step 1 In the matrix P, choose two rows and XOR the one row (rwo a) with the other row (row b) (hereinafter referred to as a primitive operation).
  • Step 2 Transform the matrix P into a unit matrix I by repeating the primitive operation, count the number of times the primitive operation was performed, and find a matrix transformation procedure that yields the minimum number of primitive operations.
  • Step 3 To construct the linear transformation part 344 A, lines A and B, which correspond to the rows a and b chosen in step 2, are XORed in the order reverse to the transformation procedure.
  • FIG. 7 there is depicted a concrete example of the second key-dependent linear transformation part 344 which has the linear transformation part 344 A determined as described above.
  • the four pieces of data mid 00 , mid 01 , mid 02 and mid 03 are input to the processing routes 30 0 to 30 3 , respectively.
  • mid 00 and mid 01 are XORed by an XOR circuit 31 0 ;
  • mid 02 and the output from the XOR circuit 31 0 are XORed by an XOR circuit 31 2 ;
  • the output from the XOR circuit 31 2 is XORed with mid 01 by an XOR circuit 31 1 .
  • the output from the XOR circuit 31 0 and the data mid 03 are XORed by an XOR circuit 31 3 ; in the processing route 30 1 , the outputs from the XOR circuits 31 1 and 31 3 are XORed by an XOR circuit 32 1 ; and in the processing route 30 0 , the outputs from the XOR circuit 32 1 and 31 0 are XORed by an XOR circuit 32 0 .
  • the outputs from the XOR circuits 32 0 , 32 1 , 31 2 and 31 3 and subkey data k i10 , k i11 , k i12 and k i13 are XORed by XOR circuits 35 0 to 35 3 of the key-dependent transformation part 344 B, respectively, from which are provided mid 10 , mid 11 , mid 12 and mid 13 .
  • the pieces of data mid 00 , mid 01 , mid 02 and mid 03 are associated with one another and then undergo linear transformation dependent on the 8-bit subkey data k i10 , k i11 , k i12 and k i13 , respectively.
  • logical operations given by the following logical expression are performed.
  • the subkey k i1 is composed of four pieces of data k i10 , k i11 , k i12 and k i13 .
  • these pieces of data mid 10 , mid 11 , mid 12 and mid 13 are then nonlinearly transformed in the nonlinear transformation parts 345 0 , 345 1 , 345 2 and 345 3 into the data out 0 , out 1 , out 2 and out 3 , respectively, which are combined into the single piece of data Y i * in the combining part 346 .
  • the data Y i * is linearly transformed into the data Y i by, for example, a k i2 -bit left rotation in the third key-dependent linear transformation part 347 using the key data k i2 , thereby generating the output data Y i from the nonlinear function part 304 .
  • the nonlinear transformation parts 343 0 to 343 3 and 345 0 to 345 3 function just like S-boxes for DES cipher, and they are constructed by, for example, ROM, which receives input data as an address to read out therefrom the corresponding data.
  • the nonlinear transformation parts 343 0 to 343 3 are arranged in parallel and their transformation processes are not associated with one another, hence they can be executed in parallel. The same goes for the nonlinear transformation parts 345 0 to 345 3 .
  • the each linear transformation part can be executed in one step for each group (a total of two steps in the nonlinear function part 304 ).
  • p represent the differential/liner probability of the nonlinear transformation parts 343 0 to 343 3 and 345 0 to 345 3
  • the nonlinear function part 304 provides a differential/linear probability p 4 as a whole when the second key-dependent linear transformation 344 has such a construction as shown in FIG. 7 .
  • the pieces of key data fk, k 00 , k 01 , k 02 , k 10 , k 12 , . . . , k (N ⁇ 1)1 , k (N ⁇ 1)2 , ek are data stored in the key storage part 322 in FIG. 4 after being transformed in the expanded key generation part 321 from the master key Key input via the key input part 320 of the key scheduling part 20 .
  • the generation of key data in the expanded key generation part 321 may be the same as in the expanded key generation part 21 for DES cipher in FIG. 1, or as in the expanded key generation part 21 by Miyaguchi et al. depicted in FIG. 3 .
  • the initial key-dependent transformation 302 and the final key-dependent transformation part 308 shown in FIG. 4 and the key-dependent linear transformation parts 341 , 344 and 347 in each nonlinear function part 304 shown in FIG. 5 are linear transformation parts which depend on keys; therefore, the device of this embodiment is a cryptographic device which is sufficiently secure against both of differential cryptanalysis and linear cryptanalysis and hence attaches primary importance to security.
  • the present invention is not limited specifically to this example; for example, if speedup is demanded, it is feasible to omit or modify any one of the initial key-dependent transformation part 302 , the final key-dependent transformation part 308 and the key-dependent linear transformation parts 341 , 344 and 347 to a key-independent transformation part.
  • the encryption speed can be increased without significantly diminishing the security against differential cryptanalysis and the linear cryptanalysis.
  • nonlinear function part 304 of FIG. 5 in a data transformation device of the same construction as that of the first embodiment depicted in FIG. 4 .
  • the nonlinear transformation parts 343 0 , 343 1 , 343 2 and 343 3 in FIG. 5 are replaced with nonlinear transformation parts 343 0 ′ to 343 3 ′ which nonlinearly transform, for example, 8-bit inputs in 0 to in 3 into 32-bit expanded data MID 00 , MID 01 , MID 02 and MID 03 as equivalently shown in FIGS. 8A to 8 D, respectively;
  • the key-dependent linear transformation part 344 has such a construction as depicted in FIG. 9 .
  • the data R i is input to the nonlinear function part 304 together with the key data k i0 , k i1 and k i2 .
  • the data R i * is split into four pieces of data in 0 , in 1 , in 2 and in 3 in the splitting part 342 .
  • the four pieces of data in 0 , in 1 , in 2 and in 3 are nonlinearly transformed into data MID 00 , MID 01 , MID 02 and MID 03 in the nonlinear transformation parts 343 0 ′, 343 1 ′, 343 2 ′ and 343 3 ′ depicted in FIGS. 8A to 8 D, respectively.
  • the nonlinear transformation part 343 0 outputs the m-bit data mid 00 for the m-bit input in 0
  • the nonlinear transformation part 343 0 ′ has an S-box that outputs the same m-bit data mid 00 as high-order m bits as does the nonlinear transformation part 343 0 in the first embodiment of FIG.
  • the nonlinear transformation part is designed to output the high-order m-bit data mid 00 to three routes by duplicating and output the m-bit data “00 . . . 0 (2) .” That is, the nonlinear transformation part 343 0 ′ is means for transforming the m-bit data in 0 to 4m-bit data
  • MID 00 [mid 00 , 00 . . . 0 (2) , mid 00 , mid 00] (8-1)
  • nonlinear transformation parts 343 1 ′, 343 2 ′ and 343 3 ′ are means for transforming the input data in 1 , in 2 and in 3 to
  • MID 01 [00 . . . 0 (2) , mid 01 , mid 01 , mid 01] (8-2)
  • MID 02 [mid 02 , mid 02 , mid 02 , 00 . . . 0 (2)] (8-3)
  • MID 03 [mid 03 , mid 03 , 00 . . . 0 (2) , mid 03] (8-4)
  • the data MID 00 expressed by Equation (8-1) can be determined by presetting as MID 00 the entire data which is provided in the four output routes of the linear transformation part 344 A when the pieces of data mid 01 , mid 02 and mid 03 except mid 00 are each set as “00 . . . 0 (2) .”
  • the data MID 01 , MID 02 and MID 03 expressed by Equations (8-2), (8-3) and (8-4) can also be easily determined.
  • These nonlinear transformation parts 343 0 ′ to 343 3 ′ may be constructed in memory as transformation tables from which to read out the data MID 00 , MID 01 , MID 02 and MID 03 by using the data in 0 , in 1 , in 2 and in 3 as addresses.
  • MID 00 and MID 01 are XORed by an XOR circuit 41 ;
  • MID 02 and MID 03 are XORed by an XOR circuit 42 ;
  • the outputs from the XOR circuits 41 and 42 are XORed by an XOR circuit 43 ;
  • the output from the XOR circuit 43 and the key data k i1 are XORed by an XOR circuit 44 .
  • the output MID 1 from the XOR circuit 44 is split into m-bit outputs mid 10 , mid 11 , mid 12 and mid 13 .
  • MID 1 MID 00 ⁇ MID 01 ⁇ MID 02 ⁇ MID 03 ⁇ k i1 . (9)
  • k i1 is composed of four pieces of data k i10 , k i1 , k i12 and k i13
  • the four pieces of data mid 10 , mid 11 , mid 12 and mid 13 are nonlinearly transformed into data out 0 , out 1 , out 2 and out 3 in the nonlinear transformation parts 345 0 , 345 1 , 345 2 and 345 3 , respectively, as in the FIG. 5, and in the combining part 346 the four pieces of data out 0 , out 1 , out 2 and out 3 are combined into the single piece of data Y i *.
  • the data Y i * is linearly transformed into the data Y i by, for example, a k i2 -bit left rotation in the third key-dependent linear transformation part 347 using the key data k i2 , thereby generating the output data Y i from the nonlinear function part 304 .
  • the nonlinear transformation parts 343 0 to 343 3 of FIGS. 8A to 8 D by only S-boxes which output 8-bit data mid 00 to mid 03 , respectively, and to provide the wirings shown in FIGS. 8A to 8 D and a register which outputs 8-bit data “00 . . . 0” in the key-dependent linear transformation part 344 to generate therein the data MID 00 to MID 03 .
  • the second key-dependent linear transformation part 344 in this embodiment implements linear transformation equivalent to that shown in FIG. 7 through the use of four XOR circuits as depicted in FIG. 9 (in FIG. 7 ten XORs), and hence permits faster transformation than in the first embodiment.
  • the four nonlinear transformation parts 343 0 to 343 3 and 345 0 to 345 3 are arranged in parallel and their nonlinear transformation processes are not associated with one another, and hence they can be executed in parallel.
  • p represent the differential/liner probability of the nonlinear transformation parts 343 0 to 343 3 and 345 0 to 345 3
  • the differential/linear probability of the nonlinear function 304 becomes p 4 as a whole.
  • a 32-bit data R i is input to the nonlinear function part 304 together with the key data k i0 , k i1 and k i2 stored in the key storage part 322 .
  • the data R i * is split into four pieces of, for example, 8-bit data in 0 , in 1 , in 2 and in 3 in the splitting part 342 .
  • the data in 0 is further split into two, for example, 4-bit subblocks in 00 and in 01 ; the subblock in 00 is transformed to data mid 000 in a sub-nonlinear transformation part 51 and, at the same time, it is XORed with the data in 01 by an XOR circuit 52 , whose output in 00 ⁇ in 01 is transformed into data mid 001 in a sub-nonlinear transformation part 53 . Thereafter, these outputs mid 000 and mid 001 are XORed by an XOR circuit 54 , and its output and the data mid 001 are combined into the data mid 00 .
  • the nonlinear transformation part 343 0 splits the input in 0 into two subblocks, then performs linear transformation and nonlinear transformation of the two subblocks, and combines the two resulting output subblocks into the output from the nonlinear transformation part.
  • the other remaining pieces of data in 1 , in 2 and in 3 are also transformed into the data mid 01 , mid 02 and mid 03 in the nonlinear transformation parts 343 1 , 343 2 and 343 3 each having the functional configuration shown in FIG. 10 which comprises two nonlinear transformation parts and two XOR circuits.
  • the data mid 10 is input to.the nonlinear transformation part 345 0 of the same functional consfiguration as shown in FIG. 10, wherein it is further split into two subblocks mid 100 and mid 101 .
  • the subblock mid 100 is transformed into data out 00 in the sub-nonlinear transformation part 51 .
  • the subblocks mid 100 and mid 101 are XORed by the XOR circuit 52 , and its output mid 100 ⁇ mid 101 is transformed into data out 01 in the nonlinear transformation part 53 .
  • the two pieces of data out 00 and out 01 are XORed by the XOR circuit 54 , and its output out 00 ⁇ out 01 and the data out 01 are combined into out 0 .
  • the other remaining pieces of data mid 11 , mid 12 and mid 13 are also transformed into the data out 1 , out 2 and out 3 in the nonlinear transformation parts 345 1 , 345 2 and 345 3 each having the functional configuration shown in FIG. 10 which comprises the two sub-nonlinear transformation parts 51 , 53 and the two XOR circuits 52 , 54 .
  • the four pieces of thus nonlinearly transformed data out 0 , out 1 , out 2 and out 3 are combined into a single piece of data Y i * in the combining part 346 .
  • the data Y i * is linearly transformed into data Y i , for example, by a k i2 -bit left rotation in the third key-dependent linear transformation part 347 using the key data k i2 , by which the output data Y i from the nonlinear function part 304 is generated.
  • each of the nonlinear transformation parts 343 0 to 343 3 and 345 0 to 345 3 the input data is split to two pieces of data, which are nonlinearly transformed in the two sub-nonlinear transformation parts ( 51 and 53 in FIG. 10 ).
  • the nonlinear transformation parts 343 0 to 343 3 and 345 0 to 345 3 data of a bit length twice larger than that of data that the 16 sub-nonlinear transformation parts can handle.
  • each input data to the nonlinear transformation parts 343 0 to 343 3 and 345 0 to 345 3 is 16 bits length and the input data to the nonlinear function part 304 is 64 bits length.
  • the block length in the data transformation device of FIG. 4 can be made 128 bits length.
  • the sub-nonlinear transformation parts 51 and 53 are arranged in parallel in groups of eight and their nonlinear transformation processes are not associated with one another, and hence they can be executed in parallel. Further, letting p represent the differential/linear probabilities of the sub-nonlinear transformation parts 51 and 53 , the nonlinear function part 304 provides a differential/linear probability p 4 as a whole.
  • the first key-dependent linear transformation part 341 , the second key-dependent transformation part 344 and the third key-dependent transformation part 347 need not always be key-dependent, i.e., the linear transformation may be performed in subdata.
  • FIG. 11 is a flowchart showing the principal part of the procedure for data processing.
  • FIG. 11 shows the procedure corresponding to the entire procedure of FIG. 4 .
  • Step S1 Initialize to 0 a variable i representing the repeat count of processing.
  • Step S2 Perform initial transformation of an input plaintext and split it into left and right block data L i and R i .
  • Step S3 Process the right block data R i by a nonlinear function using the subkey k i to generate the block data Y i .
  • Step S4 Perform linear processing of the left block data R i by the block data Y i to generate the block data L i *.
  • Step S5 Change the right block data R i to new left block data L i and the block data L i * to new right block data R i .
  • Step S7 Check to see if i has reached N, and if not, return to step S3 and repeat steps S3 to S7.
  • Step S8 If it is decided in step S7 that the variable i has reached N, combine the left and right data L i and R i and output the result of final transformation as output data C.
  • step S3 in FIG. 11 Details of the process by step S3 in FIG. 11 correspond to the process by the nonlinear function part 304 shown in FIG. 5, and the procedure is depicted in FIG. 12 .
  • Step S31 Perform first key-dependent linear transformation of the right data R i into the data R i *.
  • Step S33 Read out data mid 00 , mid 01 , . . . , mid 0(n ⁇ 1) from n first S-boxes using the data in 0 , in 1 , . . . , in n ⁇ 1 as addresses.
  • Step S34 Perform key-dependent linear transformation of the data mid 00 to mid 0(n ⁇ 1) by the subkey k i1 to generate data mid 10 to mid 1(n ⁇ 1) .
  • Step S35 Read out data out 0 to out n ⁇ 1 from n second S-boxes using the data mid 10 to mid 1(n ⁇ 1) as addresses.
  • Step S36 Combine the data out 0 to out n ⁇ 1 into data Y* i .
  • Step S37 Perform third key-dependent linear transformation of the data Y* i to generate data Y i and output it.
  • step S34 may be the operations by Equations (7-1) to (7-4) or Equation (9) using the definitions by Equations (8-1) to (8-4). While FIG. 11 depicts the procedure that repeats steps S3 to S7 by the number of rounds involved, the individual processes by the round processing parts 38 0 to 38 N ⁇ 1 shown in FIG. 4 may also be programmed intact to implement the data diffusion part according to the present invention.
  • the first embodiment depicted in FIG. 4 is an embodiment in which the basic linear transformation part 344 A of FIG. 6, which constitutes the second key-dependent linear transformation part 344 of the nonlinear function part 304 (FIG. 5 ), is represented by a 4 ⁇ 4 matrix (that is, four inputs-four outputs).
  • the fourth embodiment will be described below in connection with the case where the linear transformation part 344 A is represented by an 8 ⁇ 8 matrix.
  • FIG. 13 illustrates the fimction configuration of the encryption procedure in the data transformation device according to the fourth embodiment of the present invention.
  • This configuration itself is identical with that of the first embodiment but differs from the latter in the data length and the split number n of data to be split in the nonlinear function part 304 .
  • the input data M is transformed in the initial key-dependent transformation part 302 using the key data fk stored in the key storage part 322 and is split to left and right block data L 0 and R 0 in the initial splitting part 303 .
  • 128-bit data is split into two pieces of 64-bit block data L 0 and R 0 .
  • the key-dependent initial transformation part 302 performs a linear transformation such as exclusive ORing of the key data fk and the input data M or bit rotation of the input data M by the key data fk, or nonlinear transformation by a combination of multiplications.
  • the right block data R 0 is provided to the nonlinear function part 304 together with the key data k 00 , k 01 and k 02 stored in the key storage part 322 , and in the nonlinear function part 304 it is nonlinearly transformed to data Y 0 .
  • the data Y 0 and the data L 0 are transformed by a linear operation to data L 0 * in the linear operation part 305 .
  • the data L 0 * and the data R 0 undergo data-position swapping in the swapping part 306 to provide L 1 ⁇ R 0 and R 1 ⁇ L 0 *, and the pieces of data L 1 and R 1 are fed to the next first round processing part 38 1 .
  • the block data Y i and the block data L i are transformed to data L i * by a linear operation in the linear operation part 305 .
  • the data L i * and the data R i are swapped in data position in the swapping part 306 , that is, L i+1 ⁇ R i , R i+1 ⁇ L i *.
  • the linear operation part 305 is to perform, for instance, an exclusive OR operation.
  • Letting N represent the number of rounds suitable to provide security of a data transformation device, two pieces of left and right data L N and R N are obtained as the result of such repeated processing. These pieces of data L N and R N are combined into a single piece of block data in the final combining part 307 ; for example, the two pieces of 64-bit data L N and R N are combined to 128-bit data. Then the thus combined data is transformed in a final linear transformation part 308 using the key data ek stored in the key storage part 322 , and output data C is provided as a ciphertext from the output part 309 .
  • the plaintext M can be derived from the ciphertext C by reversing the encryption procedure.
  • the key-dependent final transformation part 308 is one that performs transformation inverse to that of the key-dependent initial transformation part 302
  • the decryption can be done by inputting ciphertext data in place of the input data in FIG. 13 and then inputting the key data in a sequential order reverse to that in FIG. 13, that is, ek, k (N ⁇ 1)0 , k (N ⁇ 1)1 , k (N ⁇ 1)2 , . . . , k 10 , k 11 , k 12 , k 00 , k 01 , k 02 , fk.
  • FIG. 14 is a diagrammatic showing of the internal functional configuration of the nonlinear function part 304 .
  • the right block data R i is input to the nonlinear function part 304 together with the key data k i0 , k i1 and k i2 stored in the key storage part 322 .
  • the eight pieces of data in 0 to in 7 are nonlinearly transformed to data mid 00 to mid 07 in nonlinear transformation parts 343 0 to 343 7 , thereafter being input to the second key-dependent linear transformation part 344 using the key data k i1 .
  • the second key-dependent linear transformation part 344 performs linear transformation (XORing) among the pieces of data mid 00 , mid 01 , mid 02 , . . . , mid 07 input from eight routes to provide new data of eight routes, and further performs linear transformation (XORing) among these pieces of data of the eight routes with eight parts of the key data k i1 to provide output data mid 10 , mid 11 , mid 12 , . . . , mid 17 of the eight routes.
  • the eight pieces of data are input to nonlinear transformation parts 345 0 , 345 1 , 345 2 , . . . , 345 7 , wherein they are transformed to data out 0 , out 1 , out 2 , . . .
  • n 8.
  • a description will be given of the determination of an 8 ⁇ 8 matrix P that yield a maximum value of n d as described in the embodiment 1.
  • Step 1 Set the security threshold T (where T is an integer such that 2 ⁇ T ⁇ n).
  • Step 2 Prepare a set of column vectors C whose Hamming weights are equal to or larger than T ⁇ 1.
  • Step 3 Select a subset P c of eight column vectors from the set C. If rank(P c ) ⁇ 8, then the subset P c is not accepted as a candidate.
  • Step 3-1 Compute n d for P c as follows.
  • n d0 2 + min ( a , b ) # ⁇ ⁇ ( t ia , t ib ) ⁇ t ia ⁇ t ib ⁇ 0 , 0 ⁇ i ⁇ 8 ⁇
  • n d min ⁇ n di
  • Equations n d0 to n d9 represent the minimum number of active s-boxes in the second nonlinear transformation part 345 (second term on the right-hand side) and the total number of active s-boxes (the left-hand side) at that time, when the number of active s-boxes in the first nonlinear transformation part 343 (first term on he right-hand side) is determined.
  • its difference values can be represented as ⁇ z a and ⁇ z b , respectively.
  • n d0 the minimum number of active s-boxes in this case.
  • the construction of the linear transformation part is determined among the above-mentioned 10080 candidate matrices P.
  • the determination of the construction by an exhaustive search involves a computational complexity of approximately (8 ⁇ 7) 16 ⁇ 2 93 when 16 XORs are used—this is impossible to perform.
  • the construction is limited to one that the linear transformation part 344 A is composed of four boxes B 1 to B 4 with 8 inputs and 4 outputs as depicted in FIG. 15 A.
  • the boxes are each formed by four XOR circuits. as shown in FIG. 15 B and designed so that every input line passes through one of the XOR circuit.
  • the linear transformation part 344 A comprises a total of 16 XOR circuits.
  • the computational complexity is around (4 ⁇ 3 ⁇ 2 ⁇ 1) 4 ⁇ 2 18 , which is sufficiently small for the exhaustive search.
  • each transformation box is supplied with inputs from the four lines in which it is inserted and inputs from the remaining four lines and outputs the results of transformation to the former four lines.
  • FIG. 16 there is depicted an example of the construction of the linear transformation part 344 A using this matrix, together with the nonlinear transformation parts 343 and 345 .
  • four transformation boxes B 1 to B 4 are alternately inserted in lines of four left and right routes from eight S-boxes forming the first linear transformation part 343 , and consequently, two XOR circuits are inserted in each line.
  • T P [ 0 1 1 1 1 1 0 1 1 0 1 1 1 1 1 0 1 1 0 1 0 1 0 1 1 1 1 1 0 1 0 1 1 1 1 0 1 0 1 1 1 1 0 0 1 1 1 1 0 0 1 1 1 1 0 0 1 1 1 1 0 0 1 1 1 1 0 0 1 1 1 1 0 0 1 1 1 1 0 0 1 1 1 1 0 0 1 1 1 1 0 0 1 1 1 0 0 1 1 1 0 0 1 1 0 0 1 1 ] ( 14 )
  • FIG. 17 illustrates concrete examples of the second key-dependent linear transformation part 344 which comprises the linear transformation part 344 A of the construction determined above and a key transformation part 344 B.
  • the key transformation part 344 B calculates the XORs of the key data k i10 , k i11 , k i12 , . . . , k i17 and the outputs from the linear transformation part by XOR circuits 63 0 , 63 1 , 63 2 , . . . , 63 7 , and yield output data mid 10 , mid 11 , mid 12 , . . . , mid 17 .
  • the following operations are performed.
  • the subkey k i1 is composed of eight pieces of data k i10 , k i11 , k i12 , . . . , k i17 .
  • the pieces of data mid 00 to mid 07 are input to routes 60 0 to 60 7 , respectively.
  • the XOR circuits 61 4 , 61 5 , 61 6 , 61 7 on the routes 60 4 , 60 5 , 60 6 , 60 7 calculate the XORs of the data mid 04 and mid 00 , mid 05 and mid 01 , mid 06 and mid 02 , mid 07 and mid 03 , respectively.
  • the XOR circuits 61 0 , 61 1 , 61 2 , 61 3 on the routes 60 0 , 60 1 , 60 2 , 60 3 calculate the XORs of the data mid 00 and the output from the XOR circuit 61 6 , the data mid 01 and the output from the XOR circuit 61 7 , the data mid 02 and the output from the XOR circuit 61 4 , the data mid 03 and the output from the XOR circuit 61 5 , respectively.
  • the XOR circuits 62 4 , 62 5 , 62 6 , 62 7 on the routes 60 4 , 60 5 , 60 6 , 60 7 calculate the XORs of the outputs from the XOR circuits 61 3 and 61 4 , the outputs from the XOR circuits 61 0 and 61 5 , the outputs from the XOR circuits 61 1 and 61 6 , the outputs from the XOR circuits 61 2 and 61 7 , respectively.
  • the XOR circuits 62 0 , 62 1 , 62 2 , 62 3 on the routes 60 0 , 60 1 , 60 2 , 60 3 calculate the XORs of the outputs from the XOR circuits 61 0 and 62 4 , the outputs from the XOR circuits 61 1 and 62 5 , the outputs from the XOR circuits 61 2 and 62 6 , the outputs from the XOR circuits 61 3 and 62 7 , respectively.
  • the XOR circuits 63 0 to 63 7 on the routes 60 0 to 60 7 XOR the outputs from the XOR circuits 62 0 to 62 7 and the key data k i10 to k i17 , respectively, providing the outputs mid 10 to mid 17 from the routes 60 0 to 60 7 . That is, the outputs mid 10 to mid 17 are the XORs of six pieces of data selected from the input data mid 00 to mid 07 and the key data, and the outputs mid 14 to mid 17 are the XORs of five pieces of data selected from the input data mid 00 to mid 07 and the key data.
  • the pieces of data mid 10 , mid 11 , mid 12 , . . . , mid 17 are nonlinearly transformed to pieces of data out 0 , out 1 , out 2 , . . . , out 7 in the nonlinear transformation parts 345 0 , 345 1 , 345 2 , . . . , 345 7 , and in the combining part 346 the eight pieces of data out 0 , out 1 , out 2 , . . . , out 7 are combined into a single piece of data Y i *.
  • the data Y i * is linearly transformed to data Y i , for example, by a k i2 -bit left rotation in the third key-dependent linear transformation 347 using the key data k i2 , thereby generating the output data Y i from the nonlinear function part 304 .
  • the nonlinear transformation parts 343 0 to 343 7 and 345 0 to 345 7 function just like S-boxes for DES cipher, and they are each formed by, for example, ROM, which receives input data as an address to read out therefrom the corresponding data.
  • the eight nonlinear transformation parts 343 0 to 343 7 are arranged in parallel and their transformation processes are not associated with one another, and hence they can be executed in parallel. The same goes for the nonlinear transformation parts 345 0 to 345 7 .
  • the linear transformation operations can be executed in one step for each group (a total of two steps).
  • p represent the differential/liner probability of the nonlinear transformation parts 343 0 to 343 7 and 345 0 to 345 7
  • the nonlinear function part 304 provides a differential linear probability p 5 as a whole when the second key-dependent linear transformation 344 has such a construction as shown in FIG. 17 .
  • the second key-dependent linear transformation part 344 is not limited specifically to the linear transformation part depicted in FIG. 17 but may be modified as shown in FIG. 18, for instance.
  • circuit construction of FIG. 19 may be used, in which case the following operations are performed.
  • the second key-dependent linear transformation part 344 performs key-dependent linear transformation which yields a total of eight pieces of output data mid 10 , mid 11 , mid 12 , . . . , mid 17 , that is, four pieces of output data derived from six pieces of data selected from the eight pieces of input data mid 00 , mid 01 , mid 02 , . . . , mid 07 and four pieces of output data derived from five pieces of data selected from the eight pieces of input data. If this linear transformation is one that the eight pieces of input data mid 00 , mid 01 , mid 02 , . . .
  • mid 07 each affect the output data of at least four or more other routes (for instance, in the FIG. 17 example the input data mid 00 affects the six pieces of output data mid 11 , mid 12 , mid 13 , mid 14 , mid 15 and mid 17 ), the nonlinear function part 304 provides a differential/linear probability p 5 as a whole as described previously with reference to the FIG. 17 .
  • the key data ⁇ fk, k 00 , k 01 , k 02 , k 10 , k 11 , k 12 , . . . , k (N ⁇ 1)0 , k (n ⁇ 1)1 , k (N ⁇ 1)2 , ek ⁇ is data provided by inputting the master key via the key input part 320 to the expanded key generation part 321 , transforming it to key data and storing it in the key storage part 322 .
  • the expanded key generation part 321 may be made identical in construction with the expanded key generation part 21 for DES cipher shown in FIG. 1, or an expanded key generation part disclosed in U.S. Pat. No. 4,850,019.
  • the data transformation device is also sufficiently secure against other cryptanalysis techniques than differential and linear cryptanalysis.
  • the fourth embodiment is not limited specifically to the above constructions; if speedup is desired, any one of the initial key-dependent transformation part 302 , the final key-dependent transformation part 308 and the key-dependent linear transformation parts 341 , 344 and 347 may be omitted or modified to key-independent transformation means.
  • the encryption speed can be increased without significantly diminishing the security against differential cryptanalysis and linear cryptanalysis.
  • the basic construction of this embodiment is the same as that of the fourth embodiment of FIG. 13 except that the nonlinear transformation parts 343 0 to 343 7 in the nonlinear function part 304 of FIG. 14 are modified like the nonlinear transformation parts 343 0 ′, 343 1 ′, 343 2 ′ and 343 3 ′ in the second embodiment depicted in FIGS. 8A through 8D so that they output expanded data.
  • the second key-dependent linear transformation part 344 is similar construction to that shown in FIG. 9 .
  • the right block data R i is input to the nonlinear function part 304 together with the key data k i0 , k i1 , k i2 stored in the key storage part 322 .
  • the data R i * is split into eight pieces of data in 0 , in 1 , in 2 , . . . , in 7 in the splitting part 342 .
  • . . , in 7 are nonlinearly transformed to data MID 00 , MID 01 , MID 02 , . . . , MID 07 in the nonlinear transformation parts 343 0 ′, 343 1 ′, 343 2 ′, . . . , 343 7 ′, respectively.
  • the nonlinear transformation part 343 0 ′ is so designed as to transform the m-bit data in 0 to the following 8 ⁇ m-bit data.
  • MID 00 [00 . . . 0 (2) , mid 00 , mid 00 , mid 00 , mid 00 , mid 00 , 00 . . . 0 (2) , mid 00 ] (18-1)
  • the nonlinear transformation part 343 0 ′ has, for example, as shown in FIG. 20A, an S-box which outputs the data mid 00 in high-order m bits as does the nonlinear transformation part 343 0 in the fourth embodiment of FIG. 14 and outputs “00 . . . 0 (2) ” as low-order m bits; furthermore, it branches the output data mid 00 in six routes and “00 . . . 0 (2) ” in two other routes.
  • the nonlinear transformation part 343 1 ′ has, as depicted in FIG. 20B, an S-box 343 1 which outputs the data mid 01 in high-order m bits and outputs “00 . . . 0 (2) ” as low-order m bits; furthermore, it branches the output data mid 01 in six routes and m-bit data “00 . . . 0” in two other routes.
  • the other nonlinear transformation parts 343 2 ′ to 343 7 ′ are also similarly constructed; in FIG. 20C there is depicted the construction of the nonlinear transformation part 343 7 ′ but no description will be repeated.
  • These nonlinear transformation parts 343 1 ′ to 343 7 ′ transform data in 1 to in 7 to the following data MID 01 to MID 07 , respectively.
  • MID 01 [mid 01 , 00 . . . 0 (2) , mid 01 , mid 01 , mid 01 , mid 01 , mid 01 , mid 01 , 00 . . . 0 (2) ] (18-2)
  • MID 02 [mid 02 , mid 02 , 00 . . . 0 (2) , mid 02 , 00 . . . 0 (2) , mid 02 , mid 02 ] (18-3)
  • MID 03 [mid 03 , mid 03 , mid 03 , 00 . . . 0 (2) , mid 03 , 00 . . . 0 (2) , mid 03 , mid 03 ] (18-4)
  • MID 04 [mid 04 , 00 . . . 0 (2) , mid 04 , mid 04 , mid 04 , 00 . . . 0 (2) , 00 . . . 0 (2) , mid 04 ] (18-5)
  • MID 05 [mid 05 , mid 05 , 00 . . . 0 (2) , mid 05 , mid 05 , mid 05 , 00 . . . 0 (2) , 00 . . . 0 (2) ] (18-6)
  • MID 06 [mid 06 , mid 06 , mid 06 , 00 . . . 0 (2) , 00 . . . 0 (2) , mid 06 , mid 06 , 00 . . . 0 (2) ] (18-7)
  • MID 07 [00 . . . 0 (2) , mid 07 , mid 07 , mid 07 , 00 . . . 0 (2) , 00 . . . 0 (2) , mid 07 , mid 07 ] (18-8)
  • These pieces of data MID 00 to MID 07 can be predetermined in the same manner as described previously in connection with Equations (8-1) to (8-4) in the second embodiment. That is, the data MID 00 is a set of data which is obtained at the outputs of the eight routes of the linear transformation part 344 A in FIG. 17 when pieces of data mid 00 and mid 02 to mid 07 except mid 01 are all set as “00 . . . 0 (2) .” The same goes for the data MID 02 to MID 07 .
  • These nonlinear transformation parts 343 0 ′ to 343 7 ′ may be formed by memory from which the pieces of data MID 00 to MID 07 are directly read out using the data in 0 to in 7 as addresses.
  • the second key-dependent linear transformation part 344 is made up of XOR circuits 41 1 to 41 4 each of which XORs two pieces of input data, XOR circuits 42 1 and 42 2 each of which XORs the outputs from two of them, an XOR circuit 43 which XORs their outputs, and an XOR circuit 44 which XORs its output and the key data k i1 . With this construction, the following operation is conducted.
  • MID 1 MID 00 ⁇ MID 01 MID 02 ⁇ MID 03 ⁇ MID 04 ⁇ MID 05 ⁇ MID 06 ⁇ MID 07 ⁇ k i1 (19)
  • This output MID 1 is split into eight blocks, which are output as data mid 10 , mid 11 , mid 12 , . . . , mid 17 .
  • the linear transformation by the second key-dependent linear transformation part 344 expressed in units of m-bit subblocks, becomes as follows:
  • the above equations express a linear transformation equivalent to that by Equations (15-1) to (15-8) described previously with reference to FIG. 17 .
  • the same pieces of data mid 10 , mid 11 , mid 12 , . . . , mid 17 are generated.
  • the subkey data k i1 is composed of eight pieces of data k i10 , k i11 , k i12 , . . . , k i17 .
  • the eight pieces of data mid 10 , mid 11 , mid 12 , . . . , mid 17 are nonlinearly transformed to eight pieces of data out 0 , out 1 , out 2 , . . . , out 7 in the nonlinear transformation parts 345 0 , 345 1 , 345 2 , . . . , 345 7 in FIG. 14, and the eight pieces of data out 0 , out 1 , out 2 , . . . , out 7 are combined into a single piece of data Y i * in the combining part 346 .
  • the data Y i * is linearly transformed to data Y i by, for example, a k i2 -bit left rotation in the third key-dependent linear transformation part 347 using the key data k i2 .
  • the second key-dependent linear transformation part 344 uses eight XOR circuits but implements the linear transformation equivalent to that in FIG. 17 (which uses 24 XOR circuits), and hence it permits faster transformation than the fourth embodiment.
  • the eight nonlinear transformation parts 343 0 to 343 3 and 345 0 to 345 3 are arranged in parallel and their nonlinear transformation processes are not associated with one another, and hence they can be executed in parallel.
  • p represent the differential/liner probability of the nonlinear transformation parts 343 0 ′ to 343 7 ′
  • the differential/linear probability of the nonlinear function 304 becomes p 5 as a whole.
  • the second (key-dependent) linear transformation part 344 may perform the transformation by XORing of the input subdata without depending on the key k i1 . That is, the XOR circuits 63 0 to 63 7 in FIG. 17 and the circuits corresponding thereto in FIGS. 18, 19 and 21 may be omitted.
  • the first key-dependent linear transformation part 341 , the second key-dependent transformation part 344 and the third key-dependent transformation part 347 need not always be key-dependent, that is, the linear transformation may be performed in subdata without inputting the key data to them.
  • the data transformation processing in the fourth and fifth embodiments described above may also be implemented by executing a program of its procedure by a computer.
  • the procedure is the same as shown in FIGS. 11 and 12; hence, no description will be repeated.
  • FIG. 22 illustrates an example of the system configuration wherein the program for the data transformation processing described in connection with the first to fifth embodiment is prerecorded on a recording medium and is read out therefrom to perform the data transformation according to the present invention.
  • a central processing unit (CPU) 110 a read-only memory (ROM) 120 , a random access memory (RAM) 130 , a storage device (a hard disk HD, for instance) 140 , an I/O interface 150 and a bus interconnecting them constitute an ordinary computer 100 .
  • the program for implementing the data transformation process according to the present invention is prestored on the recording medium such as the hard disk HD.
  • the ROM 120 there are stored respective S-boxes in tabular form.
  • the program In the execution of the data transformation the program is read into the RAM 130 from the hard disk HD 140 , and upon input of the plaintext M via the interface 150 , then the program is executed under the control of the CPU 110 , and the resulting output data C is output via the interface 150 .
  • the program for the data transformation process may be one that is prestored in an arbitrary external storage device 180 .
  • the program can be used after once transferred via a driver 170 from the external storage device 180 to the hard disk 140 or the RAM 130 .
  • the output data C when the output data C is sent over a communication line or the Internet, only a person who has a common secret key is qualified to decrypt the output data C. Since the data C transformed according to the present invention is highly resistant to differential cryptanalysis and linear cryptanalysis, it is possible to achieve transmission of information with increased security.
  • the subkeys k N and k N ⁇ 1 that are very likely to be analyzed by differential cryptanalysis or linear cryptanalysis, a combination of data diffusion parts with these pieces of information allows ease in finding other subkeys.
  • the embodiment described below is intended to solve this problem by using a more complex key scheduling algorithm in the key scheduling part 20 for generating subkeys in the data transformation device of FIG. 4 that is typical of the embodiments described above.
  • the following embodiment employs a G-function part which performs the same function as that of the key diffusion part 22 depicted in FIG. 3 (the function fk in FIG.
  • an H-function part which possesses a data extracting function by which information necessary for generating subkeys is extracted from a required number of L components as uniformly as possible which were selected from L components once stored in a storage part after being output from the G-function part according to a first aspect of key generation.
  • partial information that is used as subkeys is extracted in the H-function part from the L-components output from the G-function part and is stored in a storage part, and necessary information is extracted from a required number of L-components to thereby generate the subkeys.
  • the G-function is constructed as the data diffusion fumction through the use of the F-function to be used in the data diffusion part or a subroutine forming the F-function (which functions will hereinafter be denoted by f), and a plurality of intermediate values L are generated by repeatedly using the G-function.
  • the G-function is adapted to operate on two input components (Y, v) and generate three output components (L, Y, v).
  • the bits of the component Y is equal to or larger than the bits of the master key K.
  • the G-function is called a required number (M) of times to generate M components L (where 0 ⁇ j ⁇ M ⁇ 1).
  • M required number
  • the output from the G-function called a j-th time be represented by (L j , Y j , v j )
  • Y 0 is a value containing K and that v 0 is a predetermined value (0, for instance).
  • the H-function is means to extract from each component L i information about the bit position determined by the suffix i as required according to the suffix i of the subkey and the M components L output from the G-function.
  • FIG. 23A there is depicted the basic construction of the key scheduling part of this embodiment for application to the key scheduling part 20 shown in FIG. 4 A.
  • the master key K is input to an intermediate key generation part 220 ; the intermediate key generation part 220 has a plurality (M rounds) of G-function parts which operate in cascade, and generates intermediate keys L 1 to L M , which are stored in a storage part 230 .
  • the intermediate keys L 1 to L M stored in the storage part 230 are provided to a subkey generation part 240 , wherein subkeys k i are generated based on an H-function part.
  • the structure and operation of each part will be concretely described below.
  • This example is intended to increase the security of the key scheduling part shown in FIG. 3 using a data randomization part disclosed in the aforementioned U.S. patent issued to Miyaguchi et al.
  • Q j represent the respective Q component.
  • Each Q j component is 16-bit.
  • the subkey generation part 240 constructs the subkey k 0 from the value of a first bit of the respective Q j component, the subkey k 1 from the value of a second bit of the respective Q j component, and in general, the subkey k i ⁇ 1 from the value of an i-th bit of the Q j component. That is, letting Q j [i] represent the i-th bit of the Q j component, the subkey k i is expressed by the following equation.
  • K i ⁇ 1 ( Q 1 [i], Q 2 [i], . . . , Q j [i], . . . , Q 16 [i]) (24)
  • Y j represents the value of 64 bits
  • Y j L the value of high-order 32bits of Y j
  • Y j R the value of low-order 32 bits of Y j .
  • the subkey k i is given as a function of i and L 1 to L 8 by the following equation.
  • K i ⁇ 1 H ( i, L 1 , L 2 , . . . , L 8 ) (29)
  • each L i Letting each L i be represented by (t j (1) , t j (2) , . . . ,t j (32) ) the H-function constructed the subkey k i as follows:
  • K i ( t 1 (i) , t 1 (16+i) , t 2 (16+i) , . . . , t 8 (i) , t 8 (16+i) ) (1 ⁇ i ⁇ 16) (30)
  • G-function parts 22 - 1 to 22 - 8 are provided in cascade.
  • the master key K is input as Y 0 to the first-round G-function part 22 - 1 together with a constant v 0 , and Y j ⁇ 1 and v j ⁇ 1 are input to the G-function part 22 -j of each j-th round; each G-function part randomizes Y j ⁇ 1 and outputs L j , Y j and v j .
  • L j is an intermediate key and Y j and v j are fed to the next G-function part 22 -(j+1).
  • the G-function part 22 is called eight times.
  • Step 1 Upon input Y j and v j to the G-function part 22 -(j+1), split Y j into two blocks (Y j L , Y j R ) by a splitting part 221 in FIG. 25 .
  • Step 2 Output Y j L as v j+1 . Input Y j L to a data diffusion part (f k ) 222 .
  • Step 3 Input Y j R to a data swapping part 224 .
  • Input Y j R and v j to an XOR circuit 223 to compute Y j R ⁇ v j and input the result of computation to the data diffusion part (f k ) 222 .
  • Step 4 Upon receiving Y j L and Y j R ⁇ v j as inputs thereto, the data diffuision part (f k ) 222 outputs the result of computation as L j+1 and, at the same time, input it to the swapping part 224 .
  • the eight L i components output from the G-function part 22 - 1 to 22 - 8 are once stored in the storage part 230 (FIG. 23 A).
  • the H-function part 240 performs the following steps after reading out the eight L components L 1 to L 8 from the storage part 230 .
  • Step 1 Read out each component L i from the storage part 230 and input it to a bit splitter 241 to split it bitwise as follows:
  • Step 2 Input (t 1 (i) , t 1 (16+i) , t 2 (i) , t 2 (16+i) , . . . , t 8 (i) , t 8 (16+i) ) to a bit combiner 242 to obtain the subkey as follows:
  • a plurality of intermediate keys L j are generated in the intermediate key generation part 220 .
  • the intermediate key generation part 220 is identical in construction with that depicted in FIG. 23A; that is, it comprises the plurality of G-function parts 22 as shown in FIG. 24 .
  • the intermediate key L j is fed to the subkey generation part 250 , from which bit position information, which is determined by the suffix i of the subkey k i and its bit position q, is output as information k iq and is stored in the storage part 260 .
  • Step 1 Upon input of Y j and v j to the G-function part 22 -(j+1), split Y j into two blocks (Y j L , Y j R ) by the splitting part 221 .
  • Step 2 Output Y j L as v j+1 . And input Y j L to the data diffusion part (f k ) 222 .
  • Step 3 Input Y j R to the swapping part 224 . And input Y j R and v j to the XOR circuit 223 to calculate Y j R ⁇ v j and input it to the data diffusion part (f k ) 222 .
  • Step 4 Upon receiving Y j L and Y j R ⁇ v j , the data diffusion part (f k ) 222 inputs the result of its computation as L j+1 to the subkey generation part 250 (FIG. 23B) and, at the same time, input it to the swapping part 224 .
  • Step 6 As depicted in FIG. 27, the subkey generation part 250 input L j to a bit splitter 251 to split it bitwise as follows:
  • Step 7 The bit string (t j (1) , t j (2) , . . . , t j (32) ) input to the information distributor 252 is information on the bit position of L j determined by the bit position q of the subkey k i for a suffix i being used as information on the bit position q of the subkey k i , and is stored for each L j in one of 16 storage areas of the storage part 260 divided for each subkey
  • k i ( t 1 (i) , t 1 (16+i) , t 2 (i) , t 2 (16+i) , . . . , t 8 (i) , t 8 (16+i) ) (34)
  • this embodiment uses in key scheduling an f-function used for encryption.
  • L j + 1 ( 0 ) v j ( 37 )
  • v j + 1 L j + 1 ( 4 ) ( 39 )
  • Equation (43) Suppose that [i/2] in Equation (43) represents ⁇ i/2 ⁇ .
  • Step 1 Set as v 0 a value extracted from 0123456789abcdef101112. . . (hex) by the same number of bits as the bit length of the function f.
  • Step 2 Set the master key K at Y 0 .
  • Step 1 Divide equally the input Y j into four (Y j (1) , Y j (2) , Y j (3) , Y j (4) ).
  • Equation (43) is implemented to obtain k 1 , k 2 , . . . , k N (where N ⁇ 16).
  • K is used as part of Y 0 and the remaining part is filled with a constant.
  • Part of L i is not used to compute H, that is, this occurs when the number of subkeys k i is small and the bits of L j is large.
  • (6) H is computed in the same manner as in the sixth embodiment.
  • G is computed in the same manner as in the sixth embodiment.
  • the intermediate key generation part 220 , the subkey generation parts 240 and 250 may be adapted to be operated under program control by the computer depicted in FIG. 22 .
  • the data transformation device for use in an encryption device to conceal data is designed to simultaneously meet the requirements of security and speedup, thereby ensuring security and permitting fast encryption procedure without causing a significant increase in the number of rounds.
  • the device of the present invention suitable for use in an encryption device of the common-key cryptosystem which encrypts or decrypts data in blocks using a secret key.

Abstract

A plurality of round processing parts (38) are provided each of which contains a nonlinear function part (304), and each nonlinear function part (304) comprises: a first key-dependent linear transformation part (341) which performs a linear transformation based on a subkey; a splitting part (342) which splits the output from the first key-dependent linear transformation part into n pieces of subdata; a first nonlinear transformation part (343) which nonlinearly transforms those pieces of subdata, respectively; a second key-dependent linear transformation part (344) which linearly transforms those nonlinearly transformed outputs based on a subkey and outputs n pieces of transformed subdata; a second nonlinear transformation part (345) which nonlinearly transforms those transformed subdata; and a combining part (346) which combines the nonlinearly transformed outputs. An n×n matrix, which represents the linear transformation in the second key-dependent linear transformation part (344), is formed by n vectors whose Hamming weights are equal to or larger than T−1 for a security threshold T, thereby increasing the invulnerability against differential cryptanalysis and linear cryptanalysis.

Description

TECHNICAL FIELD
The present invention relates to a transformation device that is used in a cryptographic device for concealing data in data communication or storage and, more particularly, to a data transformation device suitable for use in an encryption device of a secret-key encryption algorithm which encrypts or decrypts data blocks using a secret key, and a recording medium on which there is recorded a program for execution by the data transformation device.
PRIOR ART
With a view to constructing a fast and secure secret-key encryption algorithm, a block cipher is used according to which data for encryption is split into blocks of a suitable length and encrypted for each block. Usually, the block cipher comprises a data diffusion part which randomizes input data to be encrypted, and a key scheduling part which is supplied with a secret common key (hereinafter referred to as a master key) input to the encryption device and generates a sequence of subkeys for use by the data diffusion part. A typical secret-key encryption algorithm, which is used in the data transformation device to conceal data, is DES (Data Encryption Standard) that was FIPS-approved algorithm for encryption.
FIG. 1 illustrates the functional configuration of DES. DES uses a 64-bit secret key (8 bits being used for parity), and encrypts or decrypts data in blocks of 64 bits. In FIG. 1 the encryption process is executed in a data diffusion part 10, which begins with initial permutation of 64 bits of a plaintext M in an initial permutation part 11, followed by splitting the permuted data into two pieces of 32-bit block data L0 and R0. The block data R0 is input to a function operation part (referred to also as a round function) 12 which is a data transformation part shown as an i-th round processing part 14 i (i=0, 1, . . . , 15) in FIG. 2, wherein it is transformed to f(R0, k0) using a 48-bit subkey k0. The thus transformed data f(R0, k0) and the block data L0 are exclusive ORed in an XOR circuit 13, and its output and the block data R0 are swapped to obtain the next block data L1, R1. That is,
R 1 =L 0 ⊕f(R 0 , k 0)
L 1 =R 0
where ⊕ represents an exclusive OR. A 0-th round processing part 14 0 comprises the function operation part 12 and the XOR circuit 13 and swaps the two pieces of block data to provide the two pieces of output block data L1 and R1; similar round processing parts 14 1 to 14 15 are provided in cascade. The processing by the i-th round processing part 14 i will hereinafter be referred to as i-th processing, where i=0, 1, . . . , 15. That is, each round processing part 14 i (where 0≦i≦15) performs the following processing
R i+1 L i ⊕f(R i , k i)
L i+1 =R i
And finally concatenation two pieces of data R16 and L16 into 64-bit data, which is permuted in a final permutation part 15 to provide a 64-bit ciphertext. Incidentally, the operation of the final permutation part 15 corresponds to an inverse transform of the operation of the initial permutation part 11.
The decryption process can be executed following the same procedure as that for the encryption process except inputting subkeys k0, k1, . . . , k14, k15 to the function f (the function operation part 12) in the order k15, k14, . . . , k1, k0 which is reverse to that in the encryption process. In such an instance, the outputs L16 and R16 from the final round processing part 14 15 are further swapped as depicted, and in the decryption process the ciphertext is input to the initial permutation part 11 for execution of the process of FIG. 1, by which the plaintext is provided intact at the output of the final permutation part 15. In a key scheduling part 20 an expanded key generation part 21: splits a master key of 64 bits, except 8 bits used for parity, into two pieces of 28-bit right and left key data; then performs 16-round swapping of the two pieces of 28-bit right and left key data; and performs reduced permutation of the permuted right and left data (a total of 56 bits) provided from the respective rounds to generate 16 48-bits subkeys k0, k1, . . . , k14, k15 which are provided to the corresponding round processing parts of the data diffusion part 10.
The processing in the function operation part 12 is performed as depicted in FIG. 2. To begin with, the 32-bit block data Ri is transformed to 48-bit data E(Ri) in an expanded permutation part 17. This output data and the subkey ki are exclusive ORed in an XOR circuit 18, whose output is transformed to 48-bit data E(Ri)⊕ki, which is then split to eight pieces of 6-bit sub-block data. The eight pieces of sub-block data are input to different S-boxes S0 to S7 to derive therefrom a 4-bit output, respectively. Incidentally, the S-box Sj (where j=0, 1, . . . , 7) is a nonlinear transformation table that transforms the 6-bit input data to the 4-bit output data, and is an essential part that provides security of DES. The eight pieces of output data from the S-boxes S0 to S7 are concatenated again to 32-bit data, which is applied to a permutation part 19 to provide the output f(Ri, ki) from the function operation part 12 as shown in FIG. 2. This output is exclusive ORed with Li to obtain Ri+1.
Next, a description will be given of cryptanalysis techniques. A variety of cryptanalysis techniques have been proposed for DES and other traditional secret-key encryption algorithms; extremely effective cryptanalysis techniques among them are differential cryptanalysis proposed by E. Biham and A. Shmir, (“Differential Cryptanalysis of DES-like Cryptosystems,” Journal of Cryptology, Vol. 4, No. 1, pp.3-72) and linear cryptanalysis proposed by Matsui, (“Linear Cryptanalysis Method for DES cipher,” Advances in Cryptology-EUROCRYPT' 93 (Lecture Notes in Computer Science 765), pp. 386-397.)
Assuming that a difference between two pieces of data X and X* is defined as
ΔX=X⊕X*,
differential cryptanalysis aims to obtain the subkey k15 in the final round processing part 14 15 by applying to the following equations two sets of plaintext-ciphertext pair that an attacker possesses. In the encryption process of FIG. 1, let (Li, Ri) and (L*i, R*i) represent input data into the round processing part 14 i for first and second plaintexts respectively. With the difference defined as mentioned above, the following equations hold.
ΔL i =L i ⊕L* i
ΔR i =R i ⊕R* i
In FIG. 1, since L15=R14, L*15=R*14, L16=R15 and L*16=R*15, the following equations hold
R 16 =L 15 ⊕f(R 15 , k 15)
R* 16 =L* 15 ⊕f(R* 15 , k 15)
and the exclusive OR of both sides of these two equations is obtained as follows:
ΔR 16 =ΔL 15 ⊕f(L 16 , k 15)⊕f(L 16 ⊕ΔL 16 ,k 15).
The exclusive ORing of its both sides with ΔR14=ΔL15 gives the following equation:
f(L 16 , k 15)⊕f(L 16 ΔL 16 , k 15)=ΔR 16 ⊕ΔR 14.
At this time, since L16, ΔL16 and ΔR16 are data available from the ciphertext, they are known information. Hence, if the attacker can correctly obtain ΔR14, then only k15 in the above equation is an unknown constant; the attacker can find a correct k15 without fail by an exhaustive search for k15 using the known sets of plaintext-ciphertext pair. Accordingly, once the subkey k15 is found out, the remaining eight (i.e., 56-48) bits can easily be obtained even by another exhaustive search.
On the other hand, generally speaking, it is difficult to obtain ΔR14 since this value is an intermediate difference value. Then, assume that each round processing is approximated by the following equations with a probability pi in the 0-th to the last round but one (i.e.; the 14-th):
ΔR i+1 =ΔL i ⊕Δ{fR i)}
ΔL i+1 =ΔR i+1.
The point is that, when certain ΔRi is input to the i-th round processing part, Δ{f(ΔRi)} can be predicted with the probability pi regardless of the value of the subkey ki. The reason why such approximations can be made is that, the S-boxes, which are nonlinear transformation tables, provide an extremely uneven distribution of output differences for same input differences. For example, in the S-box S0, an input difference “110100(2)” is transformed to an output difference “0010(2)” with a probability of 1/4. Then, the approximation for each round is obtained by assuming that the S-boxes are each capable of predicting the relationship between the input difference and the output difference with a probability Psi and by combining them. Furthermore, the concatenation of such approximations in the respective rounds makes it possible to obtain ΔR14 from ΔL0 and ΔR0 (ΔL0 and ΔR0 are data derivable from the plaintext, and hence they are known) with a probability P=Πi=0 13pi. Incidentally, the higher the probability P, the easier the cryptanalysis. After the subkey k15 is thus obtained, a similar calculation is made of the subkey k14 regarding it as a 15-round DES that is one round fewer than in the above; such operations are repeated to obtain the subkeys one by one to k0.
It depends on the probability P whether this cryptanalysis succeeds; the higher the probability P, the more likely the success. Biham et al. say that DES could be broken by this cryptanalysis if 247 sets of chosen plaintext-ciphertext pair are available.
Linear cryptanalysis aims to obtain subkeys by constructing the following linear approximate equation and using the maximum likelihood method with sets of known plaintext-ciphertext pair possessed by an attacker.
(L 0 , R 0)Γ(L 0 , R 0)⊕(L 16 , R 16)Γ(L 16 , R 16)=(k 0 , k 1 , . . . , k 15)Γ(k0 , k 1 , . . . , k 15)
where Γ(X) represents the vector that chooses a particular bit position of X, and it is called a mask value.
The role of the linear approximation expression is to approximately replace the cryptographic algorithm with a linear expression and separate it into a part concerning the set of plaintext-ciphertext pairs and a part concerning the subkeys. That is, in the set of plaintext-ciphertext pairs, the all exclusive Ors between the values at particular bit positions of the plaintext and those of the ciphertext take a fixed value, which indicates that it equals the exclusive OR of the values at particular positions of the subkeys. This means that the attacker gets information
(k0, k1, . . . , k15)Γ(k0, k1, . . . , k15) (one bit)
from information
(L0, R0)Γ(L0, R0)⊕(L16, R16)Γ(L16, R16).
At this time, (L0, R0) and (L16, R16) are the plaintext and the ciphertext, respectively, and hence they are known. For this reason, if the attacker can correctly obtain Γ(L0, R0), Γ(L16, R16) and Γ(k0, k1, . . . , k15), then he can obtain (k0, k1, . . . , k15)Γ(k0, k1, . . . , k15) (one bit).
In DES only S-boxes perform nonlinear transformation; hence, if linear representations can be made for only the S-boxes, the linear approximation expression can easily be constructed. Then, assume that the each S-box can be linearly represented with a probability psi. The point here is that when the input mask value for the S-box is given, its output mask value can be predicted with the probability psi. The reason for this is that the S-boxes, which form a nonlinear transformation table, provide an extremely uneven distribution of output mask values according to the input mask values. For example, in the S-box S4, when the input mask value is “010000(2),” an output mask value “1111(2)” is predicted with a probability 3/16. By combining the mask values in these S-boxes, a linear representation of each round with the input and output mask values can be made with a probability pi, and by concatenating the linear representations of the respective rounds, Γ(L0, R0), Γ(L16, R16)and Γ(k0, k1, . . . , k15) are obtained wit the following probability:
P=1/2+215Πi=0 15 |p i−1/2|.
The higher the probability P, the easier the cryptanalysis.
According to Matsui, he has succeeded in the analysis of DES by this cryptanalysis using 243 sets of known plaintext-ciphertext pair.
To protect ciphers against the above cryptanalysis techniques, the probability P needs only to be reduced to be sufficiently small. A wide variety of proposals have been made to lessen the probability P, and the easiest way to provide increased security in the conventional cryptosystems is to increase the number of rounds. For example, Triple-DES with three DESs concatenated is an algorithm that essentially increases the number of rounds from 16 to 48, and it provides a far smaller probability P than does DES.
However, to increase the number of rounds with a view to avoiding the cryptanalysis techniques described above inevitably sacrifices the encryption speed. For example, if the number of rounds is tripled, the encryption speed is reduced down to ⅓. That is, since the encryption speed of the present DES is about 10 Mbps on the Pentium PC class, the encryption speed of Triple-DES goes down to around 3.5 Mbps. On the other hand, networks and computers are becoming increasingly faster year by year, and hence there is also a demand for data transformation devices that keep up with such speedups. With conventional data transformation devices, it is extremely difficult, therefore, to simultaneously meet the requirements of security and speedup.
Moreover, according to differential and linear cryptanalysis, the subkey in the final round is obtained as described above. Since DES has a defect that the main key can easily be derived from the subkey in the final round, there is proposed in U.S. Pat. No. 4,850,019: a method which provides increased security by increasing the complexity of the correspondence between the subkeys and the main key in the key scheduling part 20. Its fundamental configuration is shown in FIG. 3. In the above-mentioned U.S. patent, the subkeys are generated from the main key by data diffusion parts (fk), therefore it is expected that the main key cannot easily be derived from the subkeys.
Next, a description will be given, with reference to FIG. 3, of the general outlines of a key scheduling part 20 disclosed in the above-mentioned U.S. patent. An expanded key generation part 21 comprises N/2 (N=16, for example) rounds of key processing parts 21 0 to 21 N/2−1 which have key diffusion parts 22 0 to 22 N/2−1, respectively. The key processing parts 21 j (where j=0, 1, . . . , N/2−1) each perform diffusion processing of two pieces of 32-bit right and left key data, and interchange them to provide two pieces of right and left key data for input to the next-round key processing part 21 j+1. The key processing parts 21 j, except the first round, each have an exclusive OR part 23 j, which calculates the exclusive OR of the left input key data to the key processing part 21 j−1 of the preceding round and the left output key data therefrom and provides the calculated data to the key diffusion part 22 j. The left input key data of the key processing part 21 j is diffused by the output from the exclusive OR part 23 j in the key diffusion part 22 j, from which the diffused data is output as right key data for input to the next round, and the right input key data of the key processing part 21 j is output as left key data for input to the next round. The output from each key diffusion part 22 j is bit-split into two subkeys Q2j and Q2j+1 (that is, ki and ki+1), which are provided to the corresponding (i=2j)-th round processing part and (i+1=2j+1)-th round processing part in FIG. 1.
The 64-bit main key is split into two pieces of 32-bit right and left key data, then in the first-round key processing part 21 0 the left key data is diffused by the right key data in the key difflusion part 22 0 to obtain diffused left key data, and this diffused left key data and the right key data are interchanged and provided as right and left key data next to the key processing part 21 1. The outputs from the key diffusion parts 22 0 to 22 N/2−1 of the key processing parts 21 0 to 21 N/2−1 are applied as subkeys k0 to kN−1 to the corresponding round processing parts 14 0 to 14 N−1 of the data diffusion part 10 depicted in FIG. 1.
In the expanded key generation part 21 of FIG. 3, however, each key diffusion part 22 j is a function for generating a pair of key data (subkeys Q2j, Q2j+1) from two pieces of input data. In the case where when one of the two pieces of input data and the output data are known the other input data can be found out, if it is assumed that three pairs of subkeys (Q2j−2 and Q2j−1), (Q2j and Q2j+1), (Q2j+1 and Q2j+3) are known, since the output (subkeys Q2j+2 and Q2j+3) from the (j+1)-th key diffusion part 22 j+1 and the one input data (subkeys Q2j−2 and Q2j−1) thereto are known, the other input data (i.e., the output data from the exclusive OR part 23 j+1) can be obtained; and it is possible to derive, from the thus obtained data and the subkeys Q2j and Q2j+1 which constitute the one input data to the exclusive OR part 23 j+1, the input data to the preceding j-th) key diffusion part 22 j which constitute the other input data to the exclusive OR part 23 j+1, that is, the subkeys Q2j−4 and Q2j−3 which constitute the output from the three-round-preceding ((j−2)-th) key diffusion part 22 j−2. By repeating such operations in a sequential order, it is possible to determine all subkeys through data analysis only in the key scheduling part 20 without involving data analysis in the data diffusion part 10. It has been described just above that when subkeys of three consecutive rounds are known, all the subkeys concerned can be obtained, but when subkeys of two consecutive rounds, cryptanalysis will succeed even by estimating subkeys of the remaining one round by an exhaustive search.
Letting the final stage of the round processing in FIG. 1 be represented by i=N, subkeys kN and kN−1 are easy to obtain by differential and linear cryptanalysis. By analyzing the key data in the expanded key scheduling part 21 as described above using the obtained subkeys, there is the possibility of obtaining all the subkeys concerned.
A first object of the present invention is to provide a data transformation device in which the round function f (the function operation part) is so configured as to simultaneously meet the requirements of security and speedup to thereby ensure security and permit fast encryption processing without involving a substantial increases in the number of rounds, and a recording medium having recorded thereon a program for implementing the data transformation.
A second object of the present invention is to implement a key scheduling part which does not allow ease in determining other subkeys and the master key by a mere analysis of the key scheduling part even if some of the subkeys are known.
DISCLOSURE OF THE INVENTION
To attain the first object of the present invention, a nonlinear function part, in particular, comprises: a first key-dependent linear transformation part which linearly transforms input data of the nonlinear function part based on first key data stored in a key storage part; a splitting part which splits the output data of the first key-dependent linear transformation part into n pieces of subdata; first nonlinear transformation parts which nonlinearly transform these pieces of subdata, respectively; a second key-dependent linear transformation part which linearly transforms respective pieces of output subdata of the first nonlinear transformation parts based on second key data; second nonlinear transformation parts which nonlinearly transform respective pieces of output subdata of the second key-dependent linear transformation part; and a combining part which combines output subblocks of the second nonlinear transformation part into output data of the nonlinear function part; and the second key-dependent linear transformation part contains a linear transformation part which performs exclusive ORing of its inputs which is defined by an n×n matrix.
According to the present invention, it is guaranteed that when the differential probability/linear probability in the first and second nonlinear transformation parts is p (<1), the differential probability/linear probability of approximating each round is pi≦p2 (when the input difference to the function f(the nonlinear function part) is not 0 in the case of differential cryptanalysis, and when the output mask value from the function is not 0 in the case of linear cryptanalysis). And when the function f is objective, if the number of rounds of the cryptographic device is set at 3r, then the probability of the cipher becomes P≦pi 2r≦p4r. Furthermore, if the second key-dependent linear transformation part in the case of n=4, in particular, has a configuration that exclusive ORs combination of three of four pieces of subdata with one of four pieces of key data, the probability of approximating each round is pi≦p4 and the probability of the cipher is P≦pi 2r≦p8r. If the second key-dependent linear transformation part in the case of n=8 has a configuration that exclusive ORs combination of six or five of eight pieces of subdata with one of eight pieces of key data, the probability of approximating each round is pi≦p5 and the probability of the cipher is P≦pi 2r≦p10r.
Moreover, the first and second nonlinear transformation parts are arranged so that their processing can be performed completely in parallel—this contributes to speedup.
It is possible, therefore, to construct a fast and source nonlinear function against differential and linear cryptanalysis, and to permit the implementation of a data transformation device which copes with both security and speedup.
To attain the second object of the present invention, the key scheduling part is provided with: a G-function parts which perform the same function as that of the key diffusion part (the function fk), L components which are output from the G-function parts being once stored in a storage part; and an H-function part which reads out a required number of L components from the storage part and generates subkeys by extracting the respective L components as uniformly as possible. Furthermore, in the H-function part partial information, which is used as subkeys, is extracted from the L components which are outputs from the G-function parts, then the extracted information is stored in a storage part, and the subkeys are generated by extracting the partial information from the required number of L components.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a diagram depicting the functional configuration of a conventional DES cryptographic device.
FIG. 2 is a diagram depicting a concrete functional configuration of a function operation part 12 in FIG. 1.
FIG. 3 is a diagram depicting an example of an expanded key generation part 21 in FIG. 2.
FIG. 4 is a diagram illustrating the functional configuration of the first embodiment of the present invention.
FIG. 5 is a diagram showing in detail an example of the functional configuration of a nonlinear function part 304 in the first embodiment.
FIG. 6 is a diagram showing a basic configuration of a nonlinear function part for determining an optimal linear transformation part in FIG. 5.
FIG. 7 is a diagram depicting a concrete example of the second key-dependent linear transformation part 344 in FIG. 5.
FIG. 8A is a diagram depicting an equivalent functional configuration of a nonlinear transformation part 343 0′ in the second embodiment.
FIG. 8B is a diagram depicting a equivalent functional configuration of a nonlinear transformation part 343 1′ in the second embodiment.
FIG. 8C is a diagram depicting an equivalent functional configuration of a nonlinear transformation part 343 2′ in the second embodiment.
FIG. 8D is a diagram depicting an equivalent functional configuration of a nonlinear transformation part 343 2′ in the second embodiment.
FIG. 9 is a diagram showing the functional configuration of a second key-dependent linear transformation part 344 in the second embodiment.
FIG. 10 is a diagrqm showing the functional configuration of a nonlinear function part 343 0 (345 0) in the third embodiment.
FIG. 11 is a flowchart showing the procedure for implementing a data transformation by a computer.
FIG. 12 is a flowchart showing in detail the procedure of step S3 in FIG. 11.
FIG. 13 is a diagram depicting the functional configuration of the fourth embodiment of the present invention.
FIG. 14 is a diagram depicting the functional configuration of a nonlinear function part 304 in FIG. 13.
FIG. 15A is a diagram depicting a linear transformation part 334A of a limited structure intended to reduce the computational complexity involved in search.
FIG. 15B is a diagram depicting an example of configuration of one transformation box in FIG. 15A.
FIG. 16 is a diagram depicting an example of the configuration of a linear transformation part 344A determined by the search algorithm.
FIG. 17 is a diagram depicting an example of the functional configuration of a second key-dependent linear transformation part 344 in FIG. 14 in the fourth embodiment.
FIG. 18 is a diagram depicting another example of the functional configuration of a second key-dependent linear transformation part 344 in FIG. 14 in the fourth embodiment.
FIG. 19 is a diagram depicting still another example of the functional configuration of a second key-dependent linear transformation part 344 in FIG. 14 in the fourth embodiment.
FIG. 20A is a diagram illustrating the functional configuration of a nonlinear transformation part 343 0′ in the fifth embodiment.
FIG. 20B is a diagram illustrating the functional configuration of a nonlinear transformation part 343 1′.
FIG. 20C is a diagram illustrating the functional configuration of a nonlinear transformation part 343 7′.
FIG. 21 is a diagram showing the functional configuration of a second key-dependent linear transformation part 344 in the fifth embodiment.
FIG. 22 is a diagram showing a configuration for executing a data processing program recorded on a recording medium.
FIG. 23A is a block diagram depicting the basic functional configuration of a key generation part according to the present invention.
FIG. 23B is a block diagram depicting the basic functional configuration of another key generation part according to the present invention.
FIG. 24 is a block diagram depicting an example of the functional configuration of an intermediate key generation part 220 in FIGS. 23A or 23B.
FIG. 25 is a block diagram depicting the functional configuration of a G-functional part in FIG. 24 when the present invention is applied to a key scheduling part in FIG. 3.
FIG. 26 is a block diagram depicting the functional configuration of a subkey generation part 240 in FIG. 23A when the present invention is applied to a key scheduling part in FIG. 3.
FIG. 27 is a block diagram depicting an example of the functional configuration of a subkey generation part 250 in FIG. 23B when the present invention is applied to a key scheduling part in FIG. 3 (In this embodiment the subkey generation part contains an H-function part equipped with a bit extraction function).
FIG. 28 is a block diagram depicting the functional configuration of the G-function part 22 designed for the application of the present invention to a Feistel cipher which uses 128 bits as one block.
BEST MODE FOR CARRYING OUT THE INVENTION
First Embodiment
An embodiment of the present invention will be described below with reference to the accompanying drawings.
FIG. 4 illustrates the functional configuration for an encryption process in the data transformation device according to an embodiment of the present invention. The data transformation device comprises a data diffusion part 10 and a key scheduling part 20. In the data transformation device according to the present invention, too, the data diffusion part 10 comprises N rounds of cascade-connected round processing parts 38 0 to 38 N−1 which sequentially perform round processing of left and right pieces of data after input data is split into left and right pieces L0, R0; each round processing part 38 i (where i=0, 1, . . . , N−1) is made up of a nonlinear function part 304 corresponding to the function operation part 12 in FIG. 1, a linear operation part 305 corresponding to the XOR circuit 13 in FIG. 1 and a swapping part 306.
Input data M, which corresponds to a plaintext, is entered into the cryptographic device via an input part 301. The key scheduling part 20 comprises a key input part 320, a expanded key generation part 321 and a key storage part 322. Based on input data (a master key K) from the key input part 320, the expanded key generation part 321 generates plural pieces of key data (subkeys)
{fk; k00, k01; k10, k11, k12; . . . ; k(N−1)0, k(N−1)1, k(N−1)2; ek}
which are stored in the key storage part 322. The input data M is transformed in a key-dependent initial transformation part 302 with the key data fk stored in the key storage part 322, thereafter being split in an initial splitting part 303 into two pieces of left and right block data L0 and R0. For example, 64-bit data is split into two pieces of 32-bit block data L0 and R0. The key-dependent initial transformation part 302 performs a linear transformation such as exclusive ORing of the key data fk and the input data M or bit rotation of the input data M by the key data fk, or nonlinear transformation by a combination of multiplications.
The right block data R0 is provided to the nonlinear function part 304 which is characteristic of the present invention, together with the key data k00, k01 and k02 stored in the key storage part 322, and in the nonlinear function part 304 the right block data is nonlinearly transformed to data Y0. The data Y0 and the left block data L0 are transformed to data L0* through a linear operation in the linear operation part 305. The data L0* and the data R0 are swapped in the swapping part 306 to provide L1←R0, R1←L0*; and these pieces of data L1 and R1 are input to the next first round processing part 38 1.
Thereafter, in an i-th round processing parts 38 i (where i=0, 1, . . . , N−1) the same processing as mentioned above is repeated for two pieces of input block data Li and Ri. That is, the right block data Ri is input to the nonlinear function part 304 together with the key data ki0, ki1 and ki2, and in the nonlinear function part 304 it is nonlinearly transformed to data Yi. The data Yi and the data Li are transformed to data Li* by a linear operation in the linear operation part 305. The data Li* and the data Ri are swapped in data position in the swapping part 306, that is, Li+1←Ri, Ri+1←Li*. The linear operation part 305 is to perform, for instance, an exclusive OR operation.
Letting N represent the repeat count (the number of rounds) suitable to provide security of a data transformation device for encryption, two pieces of left and right data LN and RN are obtained as the result of such repeated processing by the round processing parts 38 0 to 38 N−1. These pieces of data LN and RN are combined into a single piece of block data in a final combining part 307; for example, the two pieces of 32-bit data LN and RN are combined to 64-bit data. Then the thus combined data is transformed in a final linear transformation part 308 using the key data ek stored in the key storage part 322, and output data C is provided as a ciphertext from an output part 309.
In decryption, the plaintext M can be derived from the ciphertext C by reversing the encryption procedure. In particular, when the key-dependent final transformation part 308 is one that performs a transformation inverse to that of the key-dependent initial transformation part 302, the decryption can be done by inputting ciphertext data in place of the input data in FIG. 4 and then inputting the key data in a sequential order reverse to that in FIG. 4, that is, ek, k(N−1)0, k(N−1)1, k(N−1)2, . . . , k10, k11, k12, k00, k01, k02, fk.
Next, a detailed description will be given of the internal configuration of the nonlinear function part 304. FIG. 5 is a diagrammatic showing of the internal functional configuration of the nonlinear function part 304.
The input block data Ri to the i-th round processing part 38 i constitutes input data to the nonlinear function part 304, together with the key data ki0, ki1, ki2 stored in the key storage part 322. The block data Ri is subjected to, for example, exclusive ORing with the key data ki0 in a first key-dependent linear transformation part 341, by which it is linearly transformed to data Ri*=Ri⊕ki0. Next, the thus transformed data Ri* is split into four pieces of, for instance, 8-bit data in0, in1, in2 and in3 in a splitting part 342. The four pieces of data in0, in1, in2 and in3 are nonlinearly transformed to four pieces of data mid00, mid01, mid02 and mid03 in nonlinear transformation parts 343 0, 343 1, 343 2 and 343 3, respectively, from which they are input to a second key-dependent linear transformation part 344.
The second key-dependent linear transformation part 344 performs linear transformation (XORing) among the pieces of input data mid00, mid01, mid02 and mid03 from four routes to provide new data of four routes, and further performs linear transformation (XORing) among these pieces of data of the four routes with four pieces of the key data ki1 to provide output data mid10, mid11, mid12 and mid13 of the four routes. The four pieces of data are input to nonlinear transformation parts 345 0, 345 1, 345 2 and 345 3, wherein they are transformed to data out0, out1, out2 and out3, respectively. These four pieces of data are combined into data Yi* in a combining part 346; furthermore, in a third key-dependent linear transformation part 347 the data Yi* undergoes a linear operation with the key data ki2 to generate output data Yi.
The above-mentioned second key-dependent linear transformation part 344 is configured to perform an exclusive OR operation of data between data processing routes 30 0, 30 1, 30 2 and 30 3 provided corresponding to the pieces of data mid00, mid01, mid02 and mid03, respectively, through the use of an algorithm according to the present invention, thereby providing increased security without increasing the number of rounds of the data transformation device depicted in FIG. 4. The security of he data transformation device of FIG. 4 against differential cryptanalysis and linear cryptanalysis is dependent on the configuration of the nonlinear function part 304 of each round; in particular, when the nonlinear function part 304 in FIG. 5 has such a basic configuration as shown in FIG. 6, the security depends on a first nonlinear transformation part 343 composed of n nonlinear transformation parts (S-boxes) with m-bit input data, a linear transformation part 344A for linearly transforming the n outputs and a second nonlinear transformation part 345 composed of n nonlinear transformation parts (S-boxes) for nonlinearly transforming the n m-bit outputs, respectively. It is particularly important how an optimal linear transformation part 344A is constructed which is secure against differential and linear cryptanalysis. According to the present invention, the linear transformation part 344A is represented as an n×n matrix P over {0, 1}, and the optimal linear transformation part 344A is constructed by determining elements of the matrix P in such a manner as to minimize the maximum differential and linear characteristic probabilities p, q. In this instance, a linear transformation part using the subkey ki1, which is contained in the second key-dependent linear transformation part 344, is added as a key-dependent transformation part 344B to the linear transformation part 344A determined by the matrix P as depicted in FIG. 7.
Incidentally, what is intended to mean by the word “optimal” is to provide the highest resistance to differential and linear cryptanalysis in the linear transformation part 344A of the above configuration, but it does not necessarily mean the optimum for other criteria, for example, an avalanche property. Empirically speaking, however, attacks other than differential and linear cryptanalysis can easily be avoided by only increasing the number of rounds, while it is not certain whether only some increase in the number of rounds serves to prevent differential and linear cryptanalysis unless a careful study is made of the round function used. In view of this, the present invention attaches the most importance to the resistance of the round function to differential and linear cryptanalysis and constructs the optimal linear transformation part 344A accordingly.
According to the present invention, the linear transformation part 344A in FIG. 6 is represented as the n×n matrix P over {0. 1} as referred to above. This means that the matrix P performs a linear transformation in units of m bits, and that the linear transformation part 344A can be formed by only exclusive ORs. That is, this transformation can be expressed by the following equation: z i = j = 0 n - 1 t ij z j . ( 1 )
Figure US06769063-20040727-M00001
In particular, when m=8, the linear transformation is made in units of bytes, and can be efficiently implemented on any platforms where the word width is 8-bit or more.
As a concrete example in the case of n=4, a 4×4 matrix PE will be described which is expressed by the following equation: [ z 0 z 1 z 2 z 3 ] = [ 0 1 1 1 1 0 1 1 1 1 1 0 1 1 1 1 ] [ z 0 z 1 z 2 z 3 ] . ( 2 )
Figure US06769063-20040727-M00002
The round function using the matrix PE has the following features. Let it be assumed, however, that the S-box is bijective. z′0, z′1, z′2 and z′3 defined by the above matrix represent the following operations, respectively.
z′ 0=0·z 0⊕1·z 1⊕1·z 2⊕1·z 3 =z 1 ⊕z 2 ⊕z 3  (3-1)
z′ 1=1·z 0⊕0·z 1⊕1·z 2⊕1·z 3 =z 0 ⊕z 2 ⊕z 3  (3-2)
z′ 2=1·z 0⊕1·z 1⊕1·z 2⊕0·z 3 =z 0 ⊕z 1 ⊕z 2  (3-3)
z′ 3=1·z 0⊕1·z 1⊕1·z 2⊕1·z 3 =z 0 ⊕z 1 ⊕z 2 ⊕z 3  (3-4)
The resistance of the round function to differential and linear cryptanalysis can be determined by the smallest numbers nd, n1 of active s-boxes, and these values are those determined at the time of determining the matrix P (see Appendix). In differential cryptanalysis an s-box whose input difference value Δx is nonzero is called an active s-box, and in linear cryptanalysis an s-box whose output mask value Γy is nonzero is called an active box.
In general, when given a certain matrix P, there exist a plurality of constructions of the linear transformation part 344A corresponding thereto. This is because the matrix P represents only the relationship between input and output data of the linear transformation part 344A and does not define its concrete construction. That is, if it is common in the matrix P which represents the relationship between their input and output data, linear transformation parts can be considered to have the same characteristic regardless of their individual constructions. Accordingly, in the following description, the matrix P is determined first which provides high invulnerability against differential and linear cryptanalysis and good avalanche effect, followed by determining the construction of the linear transformation part 344A. This method is more effective in finding out a linear transformation part 344A of an optimal characteristic than a method of checking individual constructions of linear transformation parts to see if they have the optical characteristic.
The elements of the n×n matrix P are determined by the following search algorithm taking the differential characteristic into account.
Step 1: Set a security threshold T (where T is an integer such that 2≦T≦n).
Step 2: Prepare a set C of column vectors whose Hamming weights are equal to or larger than T−1. More specifically, prepare n or more n-dimensional column vectors which have T−1 or more elements “1.”
Step 3: Select a subset Pc of n column vectors from the set C. Repeat the following steps until all subsets have been checked.
Step 3-1: Compute nd for the subset Pc of n column vectors. This is represented as nd(Pc).
Step 3-2: If nd(Pc)≧T, then accept a matrix Pc consisting of the n column vectors as a candidate matrix.
Step 4: Output matrices P and a value nd(P) that yields the maximum value of nd among all candidate matrices.
If the candidate matrix by the above search algorithm is adopted, then it is guaranteed that the value nd is equal to or larger than T. The matrix P that maximizes nd can efficiently be found by incrementing T by one in the order T=n, n−1, . . . , 3, 2 upon each execution of the above search algorithm.
In the above search algorithm, if it is possible to obtain relatively satisfactory invulnerability against differential and linear cryptanalysis, then a matrix with nd(Pc)≧T obtained by performing steps up to 3-2 may be used as the desired matrix P. Alternatively, the matrix Pc composed of n vectors whose Hamming weights are equal to or larger than T−1 selected in step 2 after step 1 may be used as the matrix P.
The input mask values of the linear transformation part 344A can be represented by exclusive ORs of its output mask values, and hence they can be expressed by a certain matrix as is the case with differential characteristic. As the result of our checking the relationship between the matrix for differential characteristic and the matrix for linear expression in several linear transformation parts of different constructions, the following theorem were made.
Theorem 1: Assume that an n×n matrix P over {0, 1} is given for the linear transformation part 344A. At this time, the relationship between input and output difference values Δz and Δz′ of the linear transformation part 344A (a difference path) is given by the matrix P, and the relationship between input and output mask values Γz and Γz′ (a mask value path) is given by a transposed matrix TP. That is,
Δz′=PΔz  (4)
Γz= T PΓz′.  (5)
(See Appendix) The minimum number nd of active s-boxes in the difference value path using the matrix P is equal to the minimum number n1 of active s-boxes in the mask value path using the transposed matrix TP.
Because of (See Appendix) n1 is also equal to or larger than T when the candidate matrices by the search algorithm are adopted. For example, in the case of the afore-mentioned matrix PE, the matrix PE for the difference value path and the matrix TPE for the mask value path bear the following relationship. P E = [ 0 1 1 1 1 0 1 1 1 1 1 0 1 1 1 1 ] P E T = [ 0 1 1 1 1 0 1 1 1 1 1 1 1 1 0 1 ] ( 6 )
Figure US06769063-20040727-M00003
It can be proven that nd=3 and n1=3 for the two matrices (see Appendix).
The following is an algorithm for determining the construction of the linear transformation part 344A when given the matrix P. Here, the following conditions are to be met.
(1) Minimization of the number of exclusive ORs (XORs), or
(2) Repeated appearance of the similar subconstruction.
Step 1: In the matrix P, choose two rows and XOR the one row (rwo a) with the other row (row b) (hereinafter referred to as a primitive operation).
Step 2: Transform the matrix P into a unit matrix I by repeating the primitive operation, count the number of times the primitive operation was performed, and find a matrix transformation procedure that yields the minimum number of primitive operations.
Step 3: To construct the linear transformation part 344A, lines A and B, which correspond to the rows a and b chosen in step 2, are XORed in the order reverse to the transformation procedure.
In FIG. 7 there is depicted a concrete example of the second key-dependent linear transformation part 344 which has the linear transformation part 344A determined as described above. In the linear transformation part 344A, the four pieces of data mid00, mid01, mid02 and mid03 are input to the processing routes 30 0 to 30 3, respectively. In the processing route 30 0, mid00 and mid01 are XORed by an XOR circuit 31 0; in the processing route 30 2, mid02 and the output from the XOR circuit 31 0 are XORed by an XOR circuit 31 2; and the output from the XOR circuit 31 2 is XORed with mid01 by an XOR circuit 31 1.
In the processing route 30 3, the output from the XOR circuit 31 0 and the data mid03 are XORed by an XOR circuit 31 3; in the processing route 30 1, the outputs from the XOR circuits 31 1 and 31 3 are XORed by an XOR circuit 32 1; and in the processing route 30 0, the outputs from the XOR circuit 32 1 and 31 0 are XORed by an XOR circuit 32 0.
The outputs from the XOR circuits 32 0, 32 1, 31 2 and 31 3 and subkey data ki10, ki11, ki12 and ki13 are XORed by XOR circuits 35 0 to 35 3 of the key-dependent transformation part 344B, respectively, from which are provided mid10, mid11, mid12 and mid13. In other words, the pieces of data mid00, mid01, mid02 and mid03 are associated with one another and then undergo linear transformation dependent on the 8-bit subkey data ki10, ki11, ki12 and ki13, respectively. In short, logical operations given by the following logical expression are performed.
mid 10 =mid 00 ⊕mid 02 ⊕mid 03 ⊕k i10  (7-1)
mid 11 =mid 01 ⊕mid 02 ⊕mid 03 ⊕k i11  (7-2)
mid 12 =mid 00 ⊕mid 01 ⊕mid 02 ⊕k i12  (7-3)
mid 13 =mid 00 ⊕mid 01 ⊕mid 03 ⊕k i13  (7-4)
Incidentally, the subkey ki1 is composed of four pieces of data ki10, ki11, ki12 and ki13.
As depicted in FIG. 5, these pieces of data mid10, mid11, mid12 and mid13 are then nonlinearly transformed in the nonlinear transformation parts 345 0, 345 1, 345 2 and 345 3 into the data out0, out1, out2 and out3, respectively, which are combined into the single piece of data Yi* in the combining part 346. Finally, the data Yi* is linearly transformed into the data Yi by, for example, a ki2-bit left rotation in the third key-dependent linear transformation part 347 using the key data ki2, thereby generating the output data Yi from the nonlinear function part 304. The nonlinear transformation parts 343 0 to 343 3 and 345 0 to 345 3 function just like S-boxes for DES cipher, and they are constructed by, for example, ROM, which receives input data as an address to read out therefrom the corresponding data.
Since the four nonlinear transformation parts 343 0 to 343 3 are arranged in parallel and their transformation processes are not associated with one another, hence they can be executed in parallel. The same goes for the nonlinear transformation parts 345 0 to 345 3. Thus, the each linear transformation part can be executed in one step for each group (a total of two steps in the nonlinear function part 304). Letting p represent the differential/liner probability of the nonlinear transformation parts 343 0 to 343 3 and 345 0 to 345 3, the nonlinear function part 304 provides a differential/linear probability p4 as a whole when the second key-dependent linear transformation 344 has such a construction as shown in FIG. 7. Accordingly, when the number of rounds of the entire data transformation device is 3r, an approximate representation is obtained with a probability P≦p8r; for example, when r=4 (12 rounds), P≦p32. In the case of DES cipher, this corresponds to 48 or more rounds, ensuring sufficiently secure against differential cryptanalysis and linear cryptanalysis.
Incidentally, the pieces of key data fk, k00, k01, k02, k10, k12, . . . , k(N−1)1, k(N−1)2, ek are data stored in the key storage part 322 in FIG. 4 after being transformed in the expanded key generation part 321 from the master key Key input via the key input part 320 of the key scheduling part 20. The generation of key data in the expanded key generation part 321 may be the same as in the expanded key generation part 21 for DES cipher in FIG. 1, or as in the expanded key generation part 21 by Miyaguchi et al. depicted in FIG. 3.
The initial key-dependent transformation 302 and the final key-dependent transformation part 308 shown in FIG. 4 and the key-dependent linear transformation parts 341, 344 and 347 in each nonlinear function part 304 shown in FIG. 5 are linear transformation parts which depend on keys; therefore, the device of this embodiment is a cryptographic device which is sufficiently secure against both of differential cryptanalysis and linear cryptanalysis and hence attaches primary importance to security.
The present invention is not limited specifically to this example; for example, if speedup is demanded, it is feasible to omit or modify any one of the initial key-dependent transformation part 302, the final key-dependent transformation part 308 and the key-dependent linear transformation parts 341, 344 and 347 to a key-independent transformation part. In this case, the encryption speed can be increased without significantly diminishing the security against differential cryptanalysis and the linear cryptanalysis.
Second Embodiment
A description will be given of another embodiment of the nonlinear function part 304 of FIG. 5 in a data transformation device of the same construction as that of the first embodiment depicted in FIG. 4. In this embodiment the nonlinear transformation parts 343 0, 343 1, 343 2 and 343 3 in FIG. 5 are replaced with nonlinear transformation parts 343 0′ to 343 3′ which nonlinearly transform, for example, 8-bit inputs in0 to in3 into 32-bit expanded data MID00, MID01, MID02 and MID03 as equivalently shown in FIGS. 8A to 8D, respectively; furthermore, the key-dependent linear transformation part 344 has such a construction as depicted in FIG. 9.
As is the case with the FIG. 5, the data Ri is input to the nonlinear function part 304 together with the key data ki0, ki1 and ki2. The data Ri is linearly transformed into data Ri*=Ri⊕ki0, for example, by being XORed with the key data ki0 in the first key-dependent linear transformation part 341. Next, the data Ri* is split into four pieces of data in0, in1, in2 and in3 in the splitting part 342. The four pieces of data in0, in1, in2 and in3 are nonlinearly transformed into data MID00, MID01, MID02 and MID03 in the nonlinear transformation parts 343 0′, 343 1′, 343 2′ and 343 3′ depicted in FIGS. 8A to 8D, respectively. In the first embodiment the nonlinear transformation part 343 0 outputs the m-bit data mid00 for the m-bit input in0, whereas in this embodiment the nonlinear transformation part 343 0′ has an S-box that outputs the same m-bit data mid00 as high-order m bits as does the nonlinear transformation part 343 0 in the first embodiment of FIG. 5 and outputs fixed data “00 . . . 0(2)” as low-order m bits; further, the nonlinear transformation part is designed to output the high-order m-bit data mid00 to three routes by duplicating and output the m-bit data “00 . . . 0(2).” That is, the nonlinear transformation part 343 0′ is means for transforming the m-bit data in0 to 4m-bit data
MID 00 =[mid 00, 00 . . . 0(2) , mid 00 , mid 00]  (8-1)
Similarly, the nonlinear transformation parts 343 1′, 343 2′ and 343 3′ are means for transforming the input data in1, in2 and in3 to
MID 01=[00 . . . 0(2) , mid 01 , mid 01 , mid 01]  (8-2)
MID 02 =[mid 02 , mid 02 , mid 02, 00 . . . 0(2)]  (8-3)
MID 03 =[mid 03 , mid 03, 00 . . . 0(2), mid03]  (8-4)
The data MID00 expressed by Equation (8-1) can be determined by presetting as MID00 the entire data which is provided in the four output routes of the linear transformation part 344A when the pieces of data mid01, mid02 and mid03 except mid00 are each set as “00 . . . 0(2).” Similarly, the data MID01, MID02 and MID03 expressed by Equations (8-2), (8-3) and (8-4) can also be easily determined. These nonlinear transformation parts 343 0′ to 343 3′ may be constructed in memory as transformation tables from which to read out the data MID00, MID01, MID02 and MID03 by using the data in0, in1, in2and in3as addresses.
Then, these pieces of data MID00 to MID03 are input to the second key-dependent linear transformation part 344 with the key data ki1 as depicted in FIG. 9. MID00 and MID01 are XORed by an XOR circuit 41; MID02 and MID03 are XORed by an XOR circuit 42; the outputs from the XOR circuits 41 and 42 are XORed by an XOR circuit 43; and the output from the XOR circuit 43 and the key data ki1 are XORed by an XOR circuit 44. The output MID1 from the XOR circuit 44 is split into m-bit outputs mid10, mid11, mid12 and mid13. After all, the second key-dependent linear transformation part 344 linearly transforms the input data by the following operation:
MID 1 =MID 00 ⊕MID 01 ⊕MID 02 ⊕MID 03 ⊕k i1.  (9)
The components of the output MID1=[mid10, mid11, mid12, mid13] by this linear transformation operation are expressed by the following equations, respectively:
mid 10 =mid 00 ⊕mid 02 ⊕mid 03 ⊕k i10  (10-1)
mid 11 =mid 01 ⊕mid 02 ⊕mid 03 ⊕k i11  (10-2)
mid 12 =mid 00 ⊕mid 01 ⊕mid 02 ⊕k i12  (10-3)
mid 13 =mid 00 ⊕mid 01 ⊕mid 03 ⊕k i13  (10-4)
These linear transformation operations are equivalent to those in FIG. 7 given by Equations (7-1) to (7-4). In this way, the same pieces of data mid10, mid11, mid12 and mid13 as those in the first embodiment are generated. Incidentally, ki1 is composed of four pieces of data ki10, ki1, ki12 and ki13
Then, the four pieces of data mid10, mid11, mid12 and mid13 are nonlinearly transformed into data out0, out1, out2 and out3 in the nonlinear transformation parts 345 0, 345 1, 345 2 and 345 3, respectively, as in the FIG. 5, and in the combining part 346 the four pieces of data out0, out1, out2 and out3 are combined into the single piece of data Yi*. Finally, the data Yi* is linearly transformed into the data Yi by, for example, a ki2-bit left rotation in the third key-dependent linear transformation part 347 using the key data ki2, thereby generating the output data Yi from the nonlinear function part 304.
In the second embodiment depicted in FIGS. 8A to 8D and 9, it is also possible to form, as is the case with the first embodiment, the nonlinear transformation parts 343 0 to 343 3 of FIGS. 8A to 8D by only S-boxes which output 8-bit data mid00 to mid03, respectively, and to provide the wirings shown in FIGS. 8A to 8D and a register which outputs 8-bit data “00 . . . 0” in the key-dependent linear transformation part 344 to generate therein the data MID00 to MID03.
The second key-dependent linear transformation part 344 in this embodiment implements linear transformation equivalent to that shown in FIG. 7 through the use of four XOR circuits as depicted in FIG. 9 (in FIG. 7 ten XORs), and hence permits faster transformation than in the first embodiment.
Furthermore, as is the case with the first embodiment, the four nonlinear transformation parts 343 0 to 343 3 and 345 0 to 345 3 are arranged in parallel and their nonlinear transformation processes are not associated with one another, and hence they can be executed in parallel. Besides, letting p represent the differential/liner probability of the nonlinear transformation parts 343 0 to 343 3 and 345 0 to 345 3, the differential/linear probability of the nonlinear function 304 becomes p4 as a whole.
Third Embodiment
A description will be given of another embodiment of the nonlinear function part 304 of still another functional configuration in the data transformation device that has the functional configuation depicted in FIG. 4 as in the first embodiment.
As depicted in FIG. 5, for example, a 32-bit data Ri is input to the nonlinear function part 304 together with the key data ki0, ki1 and ki2 stored in the key storage part 322. The data Ri is linearly transformed into data Ri*=Ri⊕ki0 by, for example, XORing with the key data ki0 in the first key-dependent linear transformation part 341. Then the data Ri* is split into four pieces of, for example, 8-bit data in0, in1, in2 and in3 in the splitting part 342.
In the nonlinear transformation part 343 0, as shown in FIG. 10, for instance, the data in0 is further split into two, for example, 4-bit subblocks in00 and in01; the subblock in00 is transformed to data mid000 in a sub-nonlinear transformation part 51 and, at the same time, it is XORed with the data in01 by an XOR circuit 52, whose output in00⊕in01 is transformed into data mid001 in a sub-nonlinear transformation part 53. Thereafter, these outputs mid000 and mid001 are XORed by an XOR circuit 54, and its output and the data mid001 are combined into the data mid00. That is, the nonlinear transformation part 343 0 splits the input in0 into two subblocks, then performs linear transformation and nonlinear transformation of the two subblocks, and combines the two resulting output subblocks into the output from the nonlinear transformation part. Similarly, the other remaining pieces of data in1, in2 and in3 are also transformed into the data mid01, mid02 and mid03 in the nonlinear transformation parts 343 1, 343 2 and 343 3 each having the functional configuration shown in FIG. 10 which comprises two nonlinear transformation parts and two XOR circuits.
These pieces of transformed data mid00, mid01, mid02 and mid03 input to the second key-dependent linear transformation part 344 depicted in FIG. 7 which uses the key data ki1. The transformation part 344 performs the aforementioned operations of Equations (7-1) to (7-4).
Then, the data mid10 is input to.the nonlinear transformation part 345 0 of the same functional consfiguration as shown in FIG. 10, wherein it is further split into two subblocks mid100 and mid101. The subblock mid100 is transformed into data out00 in the sub-nonlinear transformation part 51. The subblocks mid100 and mid101 are XORed by the XOR circuit 52, and its output mid100⊕mid101 is transformed into data out01 in the nonlinear transformation part 53. Then, the two pieces of data out00 and out01 are XORed by the XOR circuit 54, and its output out00⊕out01 and the data out01 are combined into out0. Similarly, the other remaining pieces of data mid11, mid12 and mid13 are also transformed into the data out1, out2 and out3 in the nonlinear transformation parts 345 1, 345 2 and 345 3 each having the functional configuration shown in FIG. 10 which comprises the two sub-nonlinear transformation parts 51, 53 and the two XOR circuits 52, 54.
The four pieces of thus nonlinearly transformed data out0, out1, out2 and out3 are combined into a single piece of data Yi* in the combining part 346. Finally, the data Yi* is linearly transformed into data Yi, for example, by a ki2-bit left rotation in the third key-dependent linear transformation part 347 using the key data ki2, by which the output data Yi from the nonlinear function part 304 is generated.
As described above, according to this embodiment, in each of the nonlinear transformation parts 343 0 to 343 3 and 345 0 to 345 3 the input data is split to two pieces of data, which are nonlinearly transformed in the two sub-nonlinear transformation parts (51 and 53 in FIG. 10). Hence, it is possible to input to the nonlinear transformation parts 343 0 to 343 3 and 345 0 to 345 3 data of a bit length twice larger than that of data that the 16 sub-nonlinear transformation parts can handle. For example, assuming that the sub-nonlinear transformation parts 51 and 53 are 8-bit S-boxes, each input data to the nonlinear transformation parts 343 0 to 343 3 and 345 0 to 345 3 is 16 bits length and the input data to the nonlinear function part 304 is 64 bits length. As a result, the block length in the data transformation device of FIG. 4 can be made 128 bits length.
The sub-nonlinear transformation parts 51 and 53 are arranged in parallel in groups of eight and their nonlinear transformation processes are not associated with one another, and hence they can be executed in parallel. Further, letting p represent the differential/linear probabilities of the sub-nonlinear transformation parts 51 and 53, the nonlinear function part 304 provides a differential/linear probability p4 as a whole.
In the above, the first key-dependent linear transformation part 341, the second key-dependent transformation part 344 and the third key-dependent transformation part 347 need not always be key-dependent, i.e., the linear transformation may be performed in subdata.
While in the above the data processing has been described to be performed using a hardware structure, it may also be implemented by software that follows a program. For example, FIG. 11 is a flowchart showing the principal part of the procedure for data processing. FIG. 11 shows the procedure corresponding to the entire procedure of FIG. 4.
Step S1: Initialize to 0 a variable i representing the repeat count of processing.
Step S2: Perform initial transformation of an input plaintext and split it into left and right block data Li and Ri.
Step S3: Process the right block data Ri by a nonlinear function using the subkey ki to generate the block data Yi.
Step S4: Perform linear processing of the left block data Ri by the block data Yi to generate the block data Li*.
Step S5: Change the right block data Ri to new left block data Li and the block data Li* to new right block data Ri.
Sep S6: Increment the variable i by one.
Step S7: Check to see if i has reached N, and if not, return to step S3 and repeat steps S3 to S7.
Step S8: If it is decided in step S7 that the variable i has reached N, combine the left and right data Li and Ri and output the result of final transformation as output data C.
Details of the process by step S3 in FIG. 11 correspond to the process by the nonlinear function part 304 shown in FIG. 5, and the procedure is depicted in FIG. 12.
Step S31: Perform first key-dependent linear transformation of the right data Ri into the data Ri*.
Step S32: Split the data Ri* into n m-bit data in0, in1, . . . inn−1 (where m=8 and n=4, for instance).
Step S33: Read out data mid00, mid01, . . . , mid0(n−1) from n first S-boxes using the data in0, in1, . . . , inn−1 as addresses.
Step S34: Perform key-dependent linear transformation of the data mid00 to mid0(n−1) by the subkey ki1 to generate data mid10 to mid1(n−1).
Step S35: Read out data out0 to outn−1 from n second S-boxes using the data mid10 to mid1(n−1) as addresses.
Step S36: Combine the data out0 to outn−1 into data Y*i.
Step S37: Perform third key-dependent linear transformation of the data Y*i to generate data Yi and output it.
The operations in step S34 may be the operations by Equations (7-1) to (7-4) or Equation (9) using the definitions by Equations (8-1) to (8-4). While FIG. 11 depicts the procedure that repeats steps S3 to S7 by the number of rounds involved, the individual processes by the round processing parts 38 0 to 38 N−1 shown in FIG. 4 may also be programmed intact to implement the data diffusion part according to the present invention.
Fourth Embodiment
The first embodiment depicted in FIG. 4 is an embodiment in which the basic linear transformation part 344A of FIG. 6, which constitutes the second key-dependent linear transformation part 344 of the nonlinear function part 304 (FIG. 5), is represented by a 4×4 matrix (that is, four inputs-four outputs). The fourth embodiment will be described below in connection with the case where the linear transformation part 344A is represented by an 8×8 matrix.
FIG. 13 illustrates the fimction configuration of the encryption procedure in the data transformation device according to the fourth embodiment of the present invention. This configuration itself is identical with that of the first embodiment but differs from the latter in the data length and the split number n of data to be split in the nonlinear function part 304.
The input data M is transformed in the initial key-dependent transformation part 302 using the key data fk stored in the key storage part 322 and is split to left and right block data L0 and R0 in the initial splitting part 303. For example, 128-bit data is split into two pieces of 64-bit block data L0 and R0. The key-dependent initial transformation part 302 performs a linear transformation such as exclusive ORing of the key data fk and the input data M or bit rotation of the input data M by the key data fk, or nonlinear transformation by a combination of multiplications.
The right block data R0 is provided to the nonlinear function part 304 together with the key data k00, k01 and k02 stored in the key storage part 322, and in the nonlinear function part 304 it is nonlinearly transformed to data Y0. The data Y0 and the data L0 are transformed by a linear operation to data L0* in the linear operation part 305. The data L0* and the data R0 undergo data-position swapping in the swapping part 306 to provide L1←R0 and R1←L0*, and the pieces of data L1 and R1 are fed to the next first round processing part 38 1.
Thereafter, in an i-th round processing parts 38 i (where i=0, 1, . . . , N−1) the same processing as mentioned above is repeated for two pieces of input block data Li and Ri. That is, the right block data Ri is input to the nonlinear function part 304 together with the key data ki0, ki1 and ki2, and in the nonlinear function part 304 it is nonlinearly transformed to block data Yi. The block data Yi and the block data Li are transformed to data Li* by a linear operation in the linear operation part 305. The data Li* and the data Ri are swapped in data position in the swapping part 306, that is, Li+1←Ri, Ri+1←Li*. The linear operation part 305 is to perform, for instance, an exclusive OR operation.
Letting N represent the number of rounds suitable to provide security of a data transformation device, two pieces of left and right data LN and RN are obtained as the result of such repeated processing. These pieces of data LN and RN are combined into a single piece of block data in the final combining part 307; for example, the two pieces of 64-bit data LN and RN are combined to 128-bit data. Then the thus combined data is transformed in a final linear transformation part 308 using the key data ek stored in the key storage part 322, and output data C is provided as a ciphertext from the output part 309.
In decryption, the plaintext M can be derived from the ciphertext C by reversing the encryption procedure. In particular, when the key-dependent final transformation part 308 is one that performs transformation inverse to that of the key-dependent initial transformation part 302, the decryption can be done by inputting ciphertext data in place of the input data in FIG. 13 and then inputting the key data in a sequential order reverse to that in FIG. 13, that is, ek, k(N−1)0, k(N−1)1, k(N−1)2, . . . , k10, k11, k12, k00, k01, k02, fk.
Next, a detailed description will be given of the internal configuration of the nonlinear function part 304. FIG. 14 is a diagrammatic showing of the internal functional configuration of the nonlinear function part 304.
The right block data Ri is input to the nonlinear function part 304 together with the key data ki0, ki1 and ki2 stored in the key storage part 322.
In the first key-dependent linear transformation part 341 the right block data Ri is transformed to data Ri*=Ri⊕ki0, for example, by XORing with the subkey data ki0. The thus transformed data Ri* is split to n=8 pieces of data in0, in1, in2, . . . , in7 in the splitting part 342. The eight pieces of data in0 to in7 are nonlinearly transformed to data mid00 to mid07 in nonlinear transformation parts 343 0 to 343 7, thereafter being input to the second key-dependent linear transformation part 344 using the key data ki1.
The second key-dependent linear transformation part 344 performs linear transformation (XORing) among the pieces of data mid00, mid01, mid02, . . . , mid07 input from eight routes to provide new data of eight routes, and further performs linear transformation (XORing) among these pieces of data of the eight routes with eight parts of the key data ki1 to provide output data mid10, mid11, mid12, . . . , mid17 of the eight routes. The eight pieces of data are input to nonlinear transformation parts 345 0, 345 1, 345 2, . . . , 345 7, wherein they are transformed to data out0, out1, out2, . . . , out7, respectively. These eight pieces of data are combined into data Yi* in a combining part 346; furthermore, in the third key-dependent linear transformation part 347 the data Yi* undergoes linear transformation with the key data ki2 to generate output data Yi.
The second key-dependent linear transformation part 344 contains the linear transformation part 344A expressed by an n×n matrix as described previously with respect to FIG. 6; in this embodiment n=8. In this instance, assume that the linear transformation part is bijective. That is, rank(P)=8. A description will be given of the determination of an 8×8 matrix P that yield a maximum value of nd as described in the embodiment 1. In this instance, the security threshold T is reduced one by one in the order T=8, 7. . . . , and the following algorithm is executed for each value.
Step 1: Set the security threshold T (where T is an integer such that 2≦T≦n).
Step 2: Prepare a set of column vectors C whose Hamming weights are equal to or larger than T−1.
Step 3: Select a subset Pc of eight column vectors from the set C. If rank(Pc)≠8, then the subset Pc is not accepted as a candidate.
Step 3-1: Compute nd for Pc as follows.
For any two columns (columns a, b): n d0 = 2 + min ( a , b ) # { ( t ia , t ib ) t ia t ib 0 , 0 i 8 }
Figure US06769063-20040727-M00004
For any three columns (columns a, b, c): n d1 = 3 + min ( a , b , c ) # { ( t ia , t ib , t ic ) t ia t ib t ic 0 , 0 i 8 }
Figure US06769063-20040727-M00005
n d2 = 3 + min ( a , b , c ) # { ( t ia , t ib , t ic )
Figure US06769063-20040727-M00006
 Exception of (0,0,0),(1,1,1), 0≦i≦8}
For any four columns (columns a, b, c, d): n d3 = 4 + min ( a , b , c , d ) # { ( t ia , t ib , t ic , t id ) ( 0 , 0 , 0 , 1 ) , ( 0 , 0 , 1 , 0 ) , ( 1 , 0 , 0 , 0 ) ( 0 , 1 , 1 , 1 ) , ( 1 , 0 , 1 , 1 ) , ( 1 , 1 , 1 , 0 ) , 0 i < 8 }
Figure US06769063-20040727-M00007
n d4 = 4 + min ( a , b , c , d ) # { ( t ia , t ib , t ic , t id )
Figure US06769063-20040727-M00008
 Exception of (0,0,0,0),(1,1,0,0),(0,1,1,1),(1,0,1,1), 0≦i<8} n d5 = 4 + min ( a , b , c , d ) # { ( t ia , t ib , t ic , t id )
Figure US06769063-20040727-M00009
 Exception of (0,0,0,0),(1,0,1,0),(0,1,1,1),(1,1,0,1), 0≦i<8} n d6 = 4 + min ( a , b , c , d ) # { ( t ia , t ib , t ic , t id )
Figure US06769063-20040727-M00010
 Exception of (0,0,0,0),(1,0,0,1),(0,1,1,1),(1,1,1,0), 0≦i<8} n d7 = 4 + min ( a , b , c , d ) # { ( t ia , t ib , t ic , t id )
Figure US06769063-20040727-M00011
 Exception of (0,0,0,0),(0,1,1,0),(1,0,1,1),(1,1,0,1), 0≦i<8} n d8 = 4 + min ( a , b , c , d ) # { ( t ia , t ib , t ic , t id )
Figure US06769063-20040727-M00012
 Exception of (0,0,0,0),(0,1,0,1),(1,0,1,1),(1,1,1,0), 0≦i<8} n d9 = 4 + min ( a , b , c , d ) # { ( t ia , t ib , t ic , t id )
Figure US06769063-20040727-M00013
 Exception of (0,0,0,0),(0,0,1,1),(1,1,0,1),(1,1,1,0), 0≦i<8}
nd=min{ndi|0≦i≦9}
Intuitively, Equations nd0 to nd9 represent the minimum number of active s-boxes in the second nonlinear transformation part 345 (second term on the right-hand side) and the total number of active s-boxes (the left-hand side) at that time, when the number of active s-boxes in the first nonlinear transformation part 343 (first term on he right-hand side) is determined. For example, when there are two active s-boxes in the first nonlinear transformation part 343, its difference values can be represented as Δza and Δzb, respectively. At this time,
z′ i ]=[t ia Δz a ⊕t ib Δz b](0≦i<8)  (11)
In particular, when Δza=Δzb,
z′ i]=[(t ia ⊕t ibz n](0≦i<8)  (12)
Accordingly, the minimum number of active s-boxes in this case is given by nd0.
As a result of our search for the matrix P through of the above search algorithm, it has been found that there is no matrix with nd≧6=T but that there are 10080 candidate matrices with nd=5=T. Hence, the invulnerability of the round function using such a matrix P against differential cryptanalysis is p≦ps 5. And the invulnerability against linear cryptanalysis is also q≦ps 5.
The construction of the linear transformation part is determined among the above-mentioned 10080 candidate matrices P. The determination of the construction by an exhaustive search involves a computational complexity of approximately (8×7)16≈293 when 16 XORs are used—this is impossible to perform. Then, the construction is limited to one that the linear transformation part 344A is composed of four boxes B1 to B4 with 8 inputs and 4 outputs as depicted in FIG. 15A. The boxes are each formed by four XOR circuits. as shown in FIG. 15B and designed so that every input line passes through one of the XOR circuit. Accordingly, the linear transformation part 344A comprises a total of 16 XOR circuits. In this instance, the computational complexity is around (4×3×2×1)4≈218, which is sufficiently small for the exhaustive search.
While in FIG. 15A four transformation boxes are alternately inserted in the lines of left and right four routes, these lines may be determined to be arbitrarily selected four lines and the other remaining four lines. Each transformation box is supplied with inputs from the four lines in which it is inserted and inputs from the remaining four lines and outputs the results of transformation to the former four lines.
As the result of searching the 10080 matrices obtained by the above search algorithm for matrices which constitute the unit matrix I with 16 primitive operations (XORs) while satisfying the construction of FIG. 15, it was found that there are 57 constructions. The matrix P of one of such construction is shown below. P = [ 0 1 1 1 1 1 1 0 1 0 1 1 0 1 1 1 1 1 0 1 1 0 1 1 1 1 1 0 1 1 0 1 1 1 0 1 1 1 0 0 1 1 1 0 0 1 1 0 0 1 1 1 0 0 1 1 1 0 1 1 1 0 0 1 ] ( 13 )
Figure US06769063-20040727-M00014
In FIG. 16 there is depicted an example of the construction of the linear transformation part 344A using this matrix, together with the nonlinear transformation parts 343 and 345. As shown, four transformation boxes B1 to B4 are alternately inserted in lines of four left and right routes from eight S-boxes forming the first linear transformation part 343, and consequently, two XOR circuits are inserted in each line.
As is the case with the 4×4 matrix in the first embodiment, it can be as certained as mentioned below whether the matrix for the mask value path is a transposed matrix of the matrix P in the linear transformation part 344A of FIG. 16 and whether n1=5 correctly holds. By constructing a mask value path in the linear transformation part 344A of FIG. 16 using concatenation rules defined by Theorem 2 in the Appendix, the matrix TP for the mask value path can be computed as follows: T P = [ 0 1 1 1 1 1 0 1 1 0 1 1 1 1 1 0 1 1 0 1 0 1 1 1 1 1 1 0 1 0 1 1 1 0 1 1 1 0 0 1 1 1 0 1 1 1 0 0 1 1 1 0 0 1 1 0 0 1 1 1 0 0 1 1 ] ( 14 )
Figure US06769063-20040727-M00015
This indicates that the matrix TP is a transposed matrix of the matrix P. Further, it can be confirmed that the minimum number of active s-boxes is n1=5.
FIG. 17 illustrates concrete examples of the second key-dependent linear transformation part 344 which comprises the linear transformation part 344A of the construction determined above and a key transformation part 344B.
The key transformation part 344B calculates the XORs of the key data ki10, ki11, ki12, . . . , ki17 and the outputs from the linear transformation part by XOR circuits 63 0, 63 1, 63 2, . . . , 63 7, and yield output data mid10, mid11, mid12, . . . , mid17. With such a functional construction as depicted in FIG. 17, the following operations are performed.
mid 10 =mid 01 ⊕mid 02 ⊕mid 03 ⊕mid 04 ⊕mid 05 ⊕mid 06 ⊕k i10   (15-1)
mid 11 =mid 00 ⊕mid 02 ⊕mid 03 ⊕mid 05 ⊕mid 06 ⊕mid 07 ⊕k i11   (15-2)
mid 12 =mid 00 ⊕mid 01 ⊕mid 03 ⊕mid 04 ⊕mid 06 ⊕mid 07 ⊕k i12   (15-3)
mid 13 =mid 00 ⊕mid 01 ⊕mid 02 ⊕mid 04 ⊕mid 05 ⊕mid 07 ⊕k i13   (15-4)
mid 14 =mid 00 ⊕mid 01 ⊕mid 03 ⊕mid 04 ⊕mid 05 ⊕k i14  (15-5)
mid 15 =mid 00 ⊕mid 01 ⊕mid 02 ⊕mid 05 ⊕mid 06 ⊕k i15  (15-6)
mid 16 =mid 01 ⊕mid 02 ⊕mid 03 ⊕mid 06 ⊕mid 07 ⊕k i16  (15-7)
mid 17 =mid 00 ⊕mid 02 ⊕mid 03 ⊕mid 04 ⊕mid 07 ⊕k i17  (15-8)
The above operations generate the data mid10, mid11, mid12, . . . , mid17. Incidentally, the subkey ki1 is composed of eight pieces of data ki10, ki11, ki12, . . . , ki17. In FIG. 17, the pieces of data mid00 to mid07 are input to routes 60 0 to 60 7, respectively.
The XOR circuits 61 4, 61 5, 61 6, 61 7 on the routes 60 4, 60 5, 60 6, 60 7 calculate the XORs of the data mid04 and mid00, mid05 and mid01, mid06 and mid02, mid07 and mid03, respectively.
The XOR circuits 61 0, 61 1, 61 2, 61 3 on the routes 60 0, 60 1, 60 2, 60 3 calculate the XORs of the data mid00 and the output from the XOR circuit 61 6, the data mid01 and the output from the XOR circuit 61 7, the data mid02 and the output from the XOR circuit 61 4, the data mid03 and the output from the XOR circuit 61 5, respectively.
The XOR circuits 62 4, 62 5, 62 6, 62 7 on the routes 60 4, 60 5, 60 6, 60 7 calculate the XORs of the outputs from the XOR circuits 61 3 and 61 4, the outputs from the XOR circuits 61 0 and 61 5, the outputs from the XOR circuits 61 1 and 61 6, the outputs from the XOR circuits 61 2 and 61 7, respectively.
The XOR circuits 62 0, 62 1, 62 2, 62 3 on the routes 60 0, 60 1, 60 2, 60 3 calculate the XORs of the outputs from the XOR circuits 61 0 and 62 4, the outputs from the XOR circuits 61 1 and 62 5, the outputs from the XOR circuits 61 2 and 62 6, the outputs from the XOR circuits 61 3 and 62 7, respectively.
Furthermore, the XOR circuits 63 0 to 63 7 on the routes 60 0 to 60 7 XOR the outputs from the XOR circuits 62 0 to 62 7 and the key data ki10 to ki17, respectively, providing the outputs mid10 to mid17 from the routes 60 0 to 60 7. That is, the outputs mid10 to mid17 are the XORs of six pieces of data selected from the input data mid00 to mid07 and the key data, and the outputs mid14 to mid17 are the XORs of five pieces of data selected from the input data mid00 to mid07 and the key data.
Turning back to FIG. 14, the pieces of data mid10, mid11, mid12, . . . , mid17 are nonlinearly transformed to pieces of data out0, out1, out2, . . . , out7 in the nonlinear transformation parts 345 0, 345 1, 345 2, . . . , 345 7, and in the combining part 346 the eight pieces of data out0, out1, out2, . . . , out7 are combined into a single piece of data Yi*. Finally, the data Yi* is linearly transformed to data Yi, for example, by a ki2-bit left rotation in the third key-dependent linear transformation 347 using the key data ki2, thereby generating the output data Yi from the nonlinear function part 304.
The nonlinear transformation parts 343 0 to 343 7 and 345 0 to 345 7 function just like S-boxes for DES cipher, and they are each formed by, for example, ROM, which receives input data as an address to read out therefrom the corresponding data.
The eight nonlinear transformation parts 343 0 to 343 7 are arranged in parallel and their transformation processes are not associated with one another, and hence they can be executed in parallel. The same goes for the nonlinear transformation parts 345 0 to 345 7. Thus, the linear transformation operations can be executed in one step for each group (a total of two steps). Letting p represent the differential/liner probability of the nonlinear transformation parts 343 0 to 343 7 and 345 0 to 345 7, the nonlinear function part 304 provides a differential linear probability p5 as a whole when the second key-dependent linear transformation 344 has such a construction as shown in FIG. 17. Accordingly, when the number of rounds of the entire data transformation device is 3r, an approximate representation is obtained with a probability P≦p10r; for example, when r=4 (12 rounds), P≦p40. In the case of DES cipher, this corresponds to 60 or more rounds, making it possible to provide a data transformation device sufficiently secure against differential cryptanalysis and linear cryptanalysis. Incidentally, the second key-dependent linear transformation part 344 is not limited specifically to the linear transformation part depicted in FIG. 17 but may be modified as shown in FIG. 18, for instance.
In this instance, the following operations are conducted.
mid 10 =mid 01 ⊕mid 02 ⊕mid 04 ⊕mid 05 ⊕mid 06 ⊕mid 07 ⊕k i10  (16-1)
mid 11 =mid 01 ⊕mid 02 ⊕mid 03 ⊕mid 04 ⊕mid 06 ⊕k i11  (16-2)
mid 12 =mid 00 ⊕mid 01 ⊕mid 03 ⊕mid 04 ⊕mid 05 ⊕mid 06 ⊕k i12  (16-3)
mid 13 =mid 00 ⊕mid 03 ⊕mid 04 ⊕mid 06 ⊕mid 07 ⊕k i13  (16-4)
mid 14 =mid 00 ⊕mid 02 ⊕mid 03 ⊕mid 05 ⊕mid 06 ⊕mid 07 ⊕k i14  (16-5)
mid 15 =mid 00 ⊕mid 01 ⊕mid 02 ⊕mid 05 ⊕mid 06 ⊕k i15  (16-6)
mid 16 =mid 00 ⊕mid 01 ⊕mid 02 ⊕mid 03 ⊕mid 04 ⊕mid 07 ⊕k i16  (16-7)
mid 17 =mid 00 ⊕mid 02 ⊕mid 04 ⊕mid 05 ⊕mid 076 ⊕k i17  (16-8)
Alternatively, the circuit construction of FIG. 19 may be used, in which case the following operations are performed.
mid 10 =mid 00 ⊕mid 01 ⊕mid 04 ⊕mid 05 ⊕mid 06 ⊕k i10  (17-1)
mid 11 =mid 01 ⊕mid 03 ⊕mid 04 ⊕mid 05 ⊕mid 07 ⊕k i11  (17-2)
mid 12 =mid 00 ⊕mid 02 ⊕mid 04 ⊕mid 06 ⊕mid 07 ⊕k i12  (17-3)
mid 13 =mid 02 ⊕mid 03 ⊕mid 05 ⊕mid 06 ⊕mid 07 ⊕k i13  (17-4)
mid 14 =mid 00 ⊕mid 01 ⊕mid 03 ⊕mid 05 ⊕mid 06 ⊕mid 07 ⊕k i14  (17-5)
mid 15 =mid 01 ⊕mid 02 ⊕mid 03 ⊕mid 04 ⊕mid 06 ⊕mid 07 ⊕k i15  (17-6)
mid 16 =mid 00 ⊕mid 01 ⊕mid 02 ⊕mid 04 ⊕mid 05 ⊕mid 07 ⊕k i16  (17-7)
mid 17 =mid 00 ⊕mid 02 ⊕mid 03 ⊕mid 04 ⊕mid 05 ⊕mid 06 ⊕k i17  (17-8)
As is evident from the operations in FIGS. 17 to 19, the second key-dependent linear transformation part 344 performs key-dependent linear transformation which yields a total of eight pieces of output data mid10, mid11, mid12, . . . , mid17, that is, four pieces of output data derived from six pieces of data selected from the eight pieces of input data mid00, mid01, mid02, . . . , mid07 and four pieces of output data derived from five pieces of data selected from the eight pieces of input data. If this linear transformation is one that the eight pieces of input data mid00, mid01, mid02, . . . , mid07 each affect the output data of at least four or more other routes (for instance, in the FIG. 17 example the input data mid00 affects the six pieces of output data mid11, mid12, mid13, mid14, mid15 and mid17), the nonlinear function part 304 provides a differential/linear probability p5 as a whole as described previously with reference to the FIG. 17.
The key data {fk, k00, k01, k02, k10, k11, k12, . . . , k(N−1)0, k(n−1)1, k(N−1)2, ek} is data provided by inputting the master key via the key input part 320 to the expanded key generation part 321, transforming it to key data and storing it in the key storage part 322.
The expanded key generation part 321 may be made identical in construction with the expanded key generation part 21 for DES cipher shown in FIG. 1, or an expanded key generation part disclosed in U.S. Pat. No. 4,850,019.
Since the initial key-dependent transformation part 302, the final key-dependent transformation part 308 and the key-dependent linear transformation parts 341, 344 and 347 are key-dependent linear transformation means, the data transformation device is also sufficiently secure against other cryptanalysis techniques than differential and linear cryptanalysis.
The fourth embodiment is not limited specifically to the above constructions; if speedup is desired, any one of the initial key-dependent transformation part 302, the final key-dependent transformation part 308 and the key-dependent linear transformation parts 341, 344 and 347 may be omitted or modified to key-independent transformation means. In this case, the encryption speed can be increased without significantly diminishing the security against differential cryptanalysis and linear cryptanalysis.
Fifth Embodiment
A description will be given of a modified form of the functional configuration of the nonlinear function part 304 in the same data transformation device as the fourth embodiment depicted in FIG. 13. The basic construction of this embodiment is the same as that of the fourth embodiment of FIG. 13 except that the nonlinear transformation parts 343 0 to 343 7 in the nonlinear function part 304 of FIG. 14 are modified like the nonlinear transformation parts 343 0′, 343 1′, 343 2′ and 343 3′ in the second embodiment depicted in FIGS. 8A through 8D so that they output expanded data. The second key-dependent linear transformation part 344 is similar construction to that shown in FIG. 9.
As depicted in FIG. 13, the right block data Ri is input to the nonlinear function part 304 together with the key data ki0, ki1, ki2 stored in the key storage part 322. In the first key-dependent linear transformation part 341 the data Ri is, for example, XORed with the key data ko and hence is linearly transformed to data Ri*=Ri⊕ki0 as in the case of FIG. 14. Then the data Ri* is split into eight pieces of data in0, in1, in2, . . . , in7 in the splitting part 342. The eight pieces of data in0, in1, in2, . . . , in7 are nonlinearly transformed to data MID00, MID01, MID02, . . . , MID07 in the nonlinear transformation parts 343 0′, 343 1′, 343 2′, . . . , 343 7′, respectively. The nonlinear transformation part 343 0′ is so designed as to transform the m-bit data in0 to the following 8×m-bit data.
MID 00=[00 . . . 0(2) , mid 00 , mid 00 , mid 00 , mid 00 , mid 00, 00 . . . 0(2) , mid 00]  (18-1)
That is, the nonlinear transformation part 343 0′ has, for example, as shown in FIG. 20A, an S-box which outputs the data mid00 in high-order m bits as does the nonlinear transformation part 343 0 in the fourth embodiment of FIG. 14 and outputs “00 . . . 0(2)” as low-order m bits; furthermore, it branches the output data mid00 in six routes and “00 . . . 0(2)” in two other routes.
The nonlinear transformation part 343 1′ has, as depicted in FIG. 20B, an S-box 343 1 which outputs the data mid01 in high-order m bits and outputs “00 . . . 0(2)” as low-order m bits; furthermore, it branches the output data mid01 in six routes and m-bit data “00 . . . 0” in two other routes. The other nonlinear transformation parts 343 2′ to 343 7′ are also similarly constructed; in FIG. 20C there is depicted the construction of the nonlinear transformation part 343 7′ but no description will be repeated. These nonlinear transformation parts 343 1′ to 343 7′ transform data in1 to in7 to the following data MID01 to MID07, respectively.
MID 01 =[mid 01, 00 . . . 0(2) , mid 01 , mid 01 , mid 01 , mid 01 , mid 01, 00 . . . 0(2)]  (18-2)
MID 02 =[mid 02 , mid 02, 00 . . . 0(2) , mid 02, 00 . . . 0(2) , mid 02 , mid 02 , mid 02]  (18-3)
MID 03 =[mid 03 , mid 03 , mid 03, 00 . . . 0(2) , mid 03, 00 . . . 0(2) , mid 03 , mid 03]  (18-4)
MID 04 =[mid 04, 00 . . . 0(2) , mid 04 , mid 04 , mid 04, 00 . . . 0(2), 00 . . . 0(2) , mid 04]  (18-5)
MID 05 =[mid 05 , mid 05, 00 . . . 0(2) , mid 05 , mid 05 , mid 05, 00 . . . 0(2), 00 . . . 0(2)]  (18-6)
MID 06 =[mid 06 , mid 06 , mid 06, 00 . . . 0(2), 00 . . . 0(2) , mid 06 , mid 06, 00 . . . 0(2)]  (18-7)
MID 07=[00 . . . 0(2) , mid 07 , mid 07 , mid 07, 00 . . . 0(2), 00 . . . 0(2) , mid 07 , mid 07]  (18-8)
These pieces of data MID00 to MID07 can be predetermined in the same manner as described previously in connection with Equations (8-1) to (8-4) in the second embodiment. That is, the data MID00 is a set of data which is obtained at the outputs of the eight routes of the linear transformation part 344A in FIG. 17 when pieces of data mid00 and mid02 to mid07 except mid01 are all set as “00 . . . 0(2).” The same goes for the data MID02 to MID07. These nonlinear transformation parts 343 0′ to 343 7′ may be formed by memory from which the pieces of data MID00 to MID07 are directly read out using the data in0 to in7 as addresses.
Then the pieces of data MID00 to MID07 are input to the second key-dependent linear transformation part 344 using the key data ki1 as shown in FIG. 21. The second key-dependent linear transformation part 344 is made up of XOR circuits 41 1 to 41 4 each of which XORs two pieces of input data, XOR circuits 42 1 and 42 2 each of which XORs the outputs from two of them, an XOR circuit 43 which XORs their outputs, and an XOR circuit 44 which XORs its output and the key data ki1. With this construction, the following operation is conducted.
MID 1 =MID 00 ⊕MID 01 MID 02 ⊕MID 03 ⊕MID 04 ⊕MID 05 ⊕MID 06 ⊕MID 07 ⊕k i1   (19)
This output MID1 is split into eight blocks, which are output as data mid10, mid11, mid12, . . . , mid17. Eventually, the linear transformation by the second key-dependent linear transformation part 344, expressed in units of m-bit subblocks, becomes as follows:
mid 10 =mid 01 ⊕mid 02 ⊕mid 03 ⊕mid 04 ⊕mid 05 ⊕mid 06 ⊕k i10  (20-1)
mid 11 =mid 00 ⊕mid 02 ⊕mid 03 ⊕mid 05 ⊕mid 06 ⊕mid 07 ⊕k i11  (20-2)
mid 12 =mid 00 ⊕mid 01 ⊕mid 03 ⊕mid 04 ⊕mid 06 ⊕mid 07 ⊕k i12  (20-3)
mid 13 =mid 00 ⊕mid 01 ⊕mid 02 ⊕mid 04 ⊕mid 05 ⊕mid 07 ⊕k i13  (20-4)
mid 14 =mid 00 ⊕mid 01 ⊕mid 03 ⊕mid 04 ⊕mid 05 ⊕k i14  (20-5)
mid 15 =mid 00 ⊕mid 01 ⊕mid 02 ⊕mid 05 ⊕mid 06 ⊕k i15  (20-6)
mid 16 =mid 01 ⊕mid 02 ⊕mid 03 ⊕mid 06 ⊕mid 07 ⊕k i16  (20-7)
mid 17 =mid 00 ⊕mid 02 ⊕mid 03 ⊕mid 04 ⊕mid 07 ⊕k i17  (20-8)
The above equations express a linear transformation equivalent to that by Equations (15-1) to (15-8) described previously with reference to FIG. 17. As a result, the same pieces of data mid10, mid11, mid12, . . . , mid17 are generated. Incidentally, the subkey data ki1, is composed of eight pieces of data ki10, ki11, ki12, . . . , ki17.
Next, the eight pieces of data mid10, mid11, mid12, . . . , mid17 are nonlinearly transformed to eight pieces of data out0, out1, out2, . . . , out7 in the nonlinear transformation parts 345 0, 345 1, 345 2, . . . , 345 7 in FIG. 14, and the eight pieces of data out0, out1, out2, . . . , out7 are combined into a single piece of data Yi* in the combining part 346. Finally, the data Yi* is linearly transformed to data Yi by, for example, a ki2-bit left rotation in the third key-dependent linear transformation part 347 using the key data ki2.
As depicted in FIG. 21, the second key-dependent linear transformation part 344 uses eight XOR circuits but implements the linear transformation equivalent to that in FIG. 17 (which uses 24 XOR circuits), and hence it permits faster transformation than the fourth embodiment.
Furthermore, as is the case with the fourth embodiment, the eight nonlinear transformation parts 343 0 to 343 3 and 345 0 to 345 3 are arranged in parallel and their nonlinear transformation processes are not associated with one another, and hence they can be executed in parallel. Besides, letting p represent the differential/liner probability of the nonlinear transformation parts 343 0′ to 343 7′, the differential/linear probability of the nonlinear function 304 becomes p5 as a whole.
In the above, the second (key-dependent) linear transformation part 344 may perform the transformation by XORing of the input subdata without depending on the key ki1. That is, the XOR circuits 63 0 to 63 7 in FIG. 17 and the circuits corresponding thereto in FIGS. 18, 19 and 21 may be omitted.
Moreover, in the above, the first key-dependent linear transformation part 341, the second key-dependent transformation part 344 and the third key-dependent transformation part 347 need not always be key-dependent, that is, the linear transformation may be performed in subdata without inputting the key data to them.
The data transformation processing in the fourth and fifth embodiments described above may also be implemented by executing a program of its procedure by a computer. The procedure is the same as shown in FIGS. 11 and 12; hence, no description will be repeated.
FIG. 22 illustrates an example of the system configuration wherein the program for the data transformation processing described in connection with the first to fifth embodiment is prerecorded on a recording medium and is read out therefrom to perform the data transformation according to the present invention. A central processing unit (CPU) 110, a read-only memory (ROM) 120, a random access memory (RAM) 130, a storage device (a hard disk HD, for instance) 140, an I/O interface 150 and a bus interconnecting them constitute an ordinary computer 100. The program for implementing the data transformation process according to the present invention is prestored on the recording medium such as the hard disk HD. In the ROM 120 there are stored respective S-boxes in tabular form. In the execution of the data transformation the program is read into the RAM 130 from the hard disk HD 140, and upon input of the plaintext M via the interface 150, then the program is executed under the control of the CPU 110, and the resulting output data C is output via the interface 150.
The program for the data transformation process may be one that is prestored in an arbitrary external storage device 180. In such an instance, the program can be used after once transferred via a driver 170 from the external storage device 180 to the hard disk 140 or the RAM 130.
Though not shown, when the output data C is sent over a communication line or the Internet, only a person who has a common secret key is qualified to decrypt the output data C. Since the data C transformed according to the present invention is highly resistant to differential cryptanalysis and linear cryptanalysis, it is possible to achieve transmission of information with increased security.
Incidentally, when in each embodiment the key scheduling part 20 has the same construction as depicted in FIG. 3, the subkeys used as ki and ki+1 in the data diffusion part 10 become the outputs Q2j and Q2j+1 (where i=2j) from the key processing part 21 in the key scheduling part 20. On the other hand, since it is the subkeys kN and kN−1 that are very likely to be analyzed by differential cryptanalysis or linear cryptanalysis, a combination of data diffusion parts with these pieces of information allows ease in finding other subkeys.
The embodiment described below is intended to solve this problem by using a more complex key scheduling algorithm in the key scheduling part 20 for generating subkeys in the data transformation device of FIG. 4 that is typical of the embodiments described above. With a view to preventing that success in analyzing the subkeys kN and kN−1 leads to the leakage of much information about the outputs from other data diffusion parts, the following embodiment employs a G-function part which performs the same function as that of the key diffusion part 22 depicted in FIG. 3 (the function fk in FIG. 3); furthermore, there is provided an H-function part which possesses a data extracting function by which information necessary for generating subkeys is extracted from a required number of L components as uniformly as possible which were selected from L components once stored in a storage part after being output from the G-function part according to a first aspect of key generation. According to a second aspect, partial information that is used as subkeys is extracted in the H-function part from the L-components output from the G-function part and is stored in a storage part, and necessary information is extracted from a required number of L-components to thereby generate the subkeys.
In the case of DES, since the subkeys are generated by only swapping bit positions of the master key, the key scheduling process is fast. However, there is a problem that if the some subkeys is known, the corresponding master key can be obtained immediately.
To provide increased complexity in the relationship between the master key and the subkeys without involving a substantial increase in the computational complexity for key scheduling and without increasing the size program of the key scheduling part, the G-function is constructed as the data diffusion fumction through the use of the F-function to be used in the data diffusion part or a subroutine forming the F-function (which functions will hereinafter be denoted by f), and a plurality of intermediate values L are generated by repeatedly using the G-function.
The G-function is adapted to operate on two input components (Y, v) and generate three output components (L, Y, v). The bits of the component Y is equal to or larger than the bits of the master key K.
To supply subkeys to the data diffusion part, the G-function is called a required number (M) of times to generate M components L (where 0≦j≦M−1). Letting the output from the G-function called a j-th time be represented by (Lj, Yj, vj), part of this value is used as the input (Yj+1=Yj, vJ+1=vj) to the G-function called a (j+1)-th time. Assume here that Y0 is a value containing K and that v0 is a predetermined value (0, for instance).
For the given master key K, the subkey ki (where i=0, 1, 2, . . . , N−1) is determined as follows:
(L i, (Y 1 , v 1))=G(Y 0 , v 0)  (21)
(L j+1, (Y j+1 , v j+1))=G(Y j , v j) (j=1, 2, . . . , M−1)  (22)
k i =H(i, L 1 , L 2 , . . . , L M) (i=0, 1, 2, . . . , N−1)  (23)
where the H-function is means to extract from each component Li information about the bit position determined by the suffix i as required according to the suffix i of the subkey and the M components L output from the G-function.
Sixth Embodiment
In FIG. 23A there is depicted the basic construction of the key scheduling part of this embodiment for application to the key scheduling part 20 shown in FIG. 4A. The master key K is input to an intermediate key generation part 220; the intermediate key generation part 220 has a plurality (M rounds) of G-function parts which operate in cascade, and generates intermediate keys L1 to LM, which are stored in a storage part 230. The intermediate keys L1 to LM stored in the storage part 230 are provided to a subkey generation part 240, wherein subkeys ki are generated based on an H-function part. The structure and operation of each part will be concretely described below.
This example is intended to increase the security of the key scheduling part shown in FIG. 3 using a data randomization part disclosed in the aforementioned U.S. patent issued to Miyaguchi et al. This embodiment will be described as being applied to the key scheduling part (FIG. 3) in the U.S. patent of Miyagushi et al. when N=16.
In FIG. 3 16 Q components are obtained by an 8 (=N/2) rounds of data diffision parts. Here, let Qj represent the respective Q component. Each Qj component is 16-bit. The subkey generation part 240 constructs the subkey k0 from the value of a first bit of the respective Qj component, the subkey k1 from the value of a second bit of the respective Qj component, and in general, the subkey ki−1 from the value of an i-th bit of the Qj component. That is, letting Qj[i] represent the i-th bit of the Qj component, the subkey ki is expressed by the following equation.
K i−1=(Q 1 [i], Q 2 [i], . . . , Q j [i], . . . , Q 16 [i])  (24)
where 1≦i,j≦16.
This processing method will be reviewed below in the framework of the G- and the H-function mentioned above. Here, Yj represents the value of 64 bits, Yj L the value of high-order 32bits of Yj and Yj R the value of low-order 32 bits of Yj.
Letting the output from the G-function for the input (Yj, vj) be represented by
 (L j+1, (Y j+1 , v j+1))=G(Y j , v j) (0≦j≦7),  (25)
the output (Lj+1, (Yj+1, vj+1)) is given by the following equations.
Y j+1 L =Y j R  (26)
Y j+1 R =L j+1 =f k(Y j L , Y j R ⊕v j)  (27)
v j+1 =Y j L  (28)
The subkey ki is given as a function of i and L1 to L8 by the following equation.
Ki−1 =H(i, L 1 , L 2 , . . . , L 8)  (29)
Letting each Li be represented by (tj (1), tj (2), . . . ,tj (32)) the H-function constructed the subkey ki as follows:
K i=(t 1 (i) , t 1 (16+i) , t 2 (16+i) , . . . , t 8 (i) , t 8 (16+i)) (1≦i≦16)  (30)
Since this method provides 16 subkeys at the maximum, the encryption algorithm described in the U.S. patent by Miyaguchi et al. can be used for the structure with a maximum of eight rounds of F-functions.
The construction of the intermediate key generation part 220 shown in FIG. 23A will be described below with reference to FIG. 24. G-function parts 22-1 to 22-8 are provided in cascade. The master key K is input as Y0 to the first-round G-function part 22-1 together with a constant v0, and Yj−1 and vj−1 are input to the G-function part 22-j of each j-th round; each G-function part randomizes Yj−1 and outputs Lj, Yj and vj. Lj is an intermediate key and Yj and vj are fed to the next G-function part 22-(j+1). That is, after setting Y0=K and v0=0, the G-function part 22 is called eight times. The construction of the G-function part is depicted in FIG. 25, for which the following process is repeated from j=0 to j=7.
Step 1: Upon input Yj and vj to the G-function part 22-(j+1), split Yj into two blocks (Yj L, Yj R) by a splitting part 221 in FIG. 25.
Step 2: Output Yj L as vj+1. Input Yj L to a data diffusion part (fk) 222.
Step 3: Input Yj R to a data swapping part 224. Input Yj R and vj to an XOR circuit 223 to compute Yj R⊕vj and input the result of computation to the data diffusion part (fk) 222.
Step 4: Upon receiving Yj L and Yj R⊕vj as inputs thereto, the data diffuision part (fk) 222 outputs the result of computation as Lj+1 and, at the same time, input it to the swapping part 224.
Step 5: Upon receiving Yj R and the result of computation Lj+1 by the data diffusion part (fk) 222, the swapping part 224 renders Yj R to Yj+1 L and Lj+1 to Yj+1 R, then concatenates them to Yj+1=(Yj+1 L, Yj+1 R), and outputs it.
The eight Li components output from the G-function part 22-1 to 22-8 are once stored in the storage part 230 (FIG. 23A).
Next, a description will be given, with reference to FIG. 26, of the construction of the H-function part serving as the subkey generation part 240. The H-function part 240 performs the following steps after reading out the eight L components L1 to L8 from the storage part 230.
Step 1: Read out each component Li from the storage part 230 and input it to a bit splitter 241 to split it bitwise as follows:
(t j (1) , t j (2) , . . . , t j (32))=Lj(j=1, 2, . . . , 8)  (31)
Step 2: Input (t1 (i), t1 (16+i), t2 (i), t2 (16+i), . . . , t8 (i), t8 (16+i)) to a bit combiner 242 to obtain the subkey as follows:
k i=(t 1 (i) , t 1 (16+i) , t 2 (i) , t 2 (16+i) , . . . , t 8 (i) , t 8 (16+i))(i=1, 2, . . . , 16)   (32)
Seventh Embodiment
A description will be given, with reference to FIGS. 23B, 24, 25 and 27, of another embodiment which outputs the same subkey as does the six embodiment.
As shown in FIG. 23B, a plurality of intermediate keys Lj are generated in the intermediate key generation part 220. The intermediate key generation part 220 is identical in construction with that depicted in FIG. 23A; that is, it comprises the plurality of G-function parts 22 as shown in FIG. 24. Upon each generation of the intermediate key Lj in the G-function part 22, the intermediate key Lj is fed to the subkey generation part 250, from which bit position information, which is determined by the suffix i of the subkey ki and its bit position q, is output as information kiq and is stored in the storage part 260.
That is, the intermediate key generation part 220 and the subkey generation part 250 repeat the following steps 1 through 7 for each value from j=0 to j=7.
Step 1: Upon input of Yj and vj to the G-function part 22-(j+1), split Yj into two blocks (Yj L, Yj R) by the splitting part 221.
Step 2: Output Yj L as vj+1. And input Yj L to the data diffusion part (fk) 222.
Step 3: Input Yj R to the swapping part 224. And input Yj R and vj to the XOR circuit 223 to calculate Yj R⊕vj and input it to the data diffusion part (fk) 222.
Step 4: Upon receiving Yj L and Yj R⊕vj, the data diffusion part (fk) 222 inputs the result of its computation as Lj+1 to the subkey generation part 250 (FIG. 23B) and, at the same time, input it to the swapping part 224.
Step 5: Upon receiving Yj R and the result of calculation Lj+1 from the data diffulsion part (fk) 222, the swapping part 224 renders Yj R to Yj+1 L and Lj+1 to Yj+1 R, then concatenates them to Yj+1=(Yj+1 L, Yj+1 R) and outputs it.
Step 6: As depicted in FIG. 27, the subkey generation part 250 input Lj to a bit splitter 251 to split it bitwise as follows:
 (t j (1) , t j (2) , . . . , t j (32))=Lj(j=1, 2, . . . , 8)  (33)
and then input them to an information distributor 252.
Step 7: The bit string (tj (1), tj (2), . . . , tj (32)) input to the information distributor 252 is information on the bit position of Lj determined by the bit position q of the subkey ki for a suffix i being used as information on the bit position q of the subkey ki, and is stored for each Lj in one of 16 storage areas of the storage part 260 divided for each subkey
k i=(t 1 (i) , t 1 (16+i) , t 2 (i) , t 2 (16+i) , . . . , t 8 (i) , t 8 (16+i))  (34)
Step 8: When 16-bit information is set for each ki, that is, when the subkey ki generated, output its value (i=1, 2, . . . , 16).
Eighth Embodiment
With a view to reducing the device size or the number of program steps, this embodiment uses in key scheduling an f-function used for encryption.
This embodiment will also be described in the framework of the G- and H-function.
Let the output from the G-function for the input (Yj, vj) be represented by
(L j+1, (Y j+1 , v j+1))=G(Y j , v j) (0≦j≦7)
and let the output be set as follows: ( ( Y j ( 1 ) , Y j ( 2 ) , Y j ( 3 ) , Y j ( 4 ) ) , v j ) ( ( L j + 1 ( 1 ) , L j + 1 ( 2 ) , L j + 1 ( 3 ) , L j + 1 ( 4 ) ) , [ ( Y j + 1 ( 1 ) , Y j + 1 ( 2 ) , Y j + 1 ( 3 ) , Y j + 1 ( 4 ) ) , v j + 1 ] ) ( 35 )
Figure US06769063-20040727-M00016
Here, the following definitions are given. Y j + 1 ( i ) = f ( Y j ( i ) ) ( i = 1 , 2 , 3 , 4 ) ( 36 ) L j + 1 ( 0 ) = v j ( 37 ) L j + 1 ( i ) = f ( L j + 1 ( i - 1 ) ) Y j + 1 ( i ) ( i = 1 , 2 , 3 , 4 ) ( 38 ) v j + 1 = L j + 1 ( 4 ) ( 39 )
Figure US06769063-20040727-M00017
Further, in
k i =H(i, L 1 , L 2 , . . . L 8)  (40)
the following definitions are given. q i + 4 j = L j + 1 ( i + 1 ) ( i = 0 , 1 , 2 , 3 ) ( 41 ) ( t i ( 0 ) , t i ( 1 ) , , t i ( 7 ) ) = q i ( i = 0 , 1 , , 31 ) ( 42 ) k ( i + 1 ) = ( t 0 + ( i mod 2 ) ( [ i / 2 ] ) , t 2 + ( i mod 2 ) ( [ i / 2 ] ) , , t 30 + ( i mod 2 ) ( [ i / 2 ] ) ) ( i = 0 , 1 , , 15 ) ( 43 )
Figure US06769063-20040727-M00018
Suppose that [i/2] in Equation (43) represents └i/2┘.
This procedure will be described below with reference to FIGS. 28 and 26.
Preparation
Step 1: Set as v0 a value extracted from 0123456789abcdef101112. . . (hex) by the same number of bits as the bit length of the function f.
Step 2: Set the master key K at Y0.
Generation of Intermediate Key: The following procedure is repeated for j=0,1, 2, . . . , 7.
Step 1: Divide equally the input Yj into four (Yj (1), Yj (2), Yj (3), Yj (4)).
Step 2: For i=1, 2, 3, 4, compute Yj+1 (i)=f(Yj (i)) by data diffusion part 611 to 614.
Step 3: set Lj+1=vj.
Step 4: For I=1, 2, 3, 4, compute f(Lj+1 (i−1)) by data diffusion part 621 to 624, and input the result of computation to an XOR circuit 63 i to XOR it with Yj+1 (i) to obtain Lj+1 (i)=f(Lj+1 (i−1))⊕Yj+1 (i).
Step 5: set Yj+1=(Yj+1 (1), Yj+1 (2), Yj+1 (3), Yj+1 (4)).
Step 6: set Lj+1=Lj+1 (1), Lj+1 (2), Lj+1 (3), Lj+1 (4)).
Step 7: Set vj+1=Lj+1 (4).
Generation of Subkey: As is the case with the sixth embodiment, Equation (43) is implemented to obtain k1, k2, . . . , kN (where N≦16).
This embodiment is not limited specifically to the above but can also be carried out in the following manner:
(1) When the size of Y0 is larger than K, K is used as part of Y0 and the remaining part is filled with a constant.
(2) An arbitrary constant is used as v0.
(3) The bit length of respective characters are arbitrarily set in the ranges in which they are harmonized with one another.
(4) Functions other than that for encryption are used as f.
(5) Part of Li is not used to compute H, that is, this occurs when the number of subkeys ki is small and the bits of Lj is large.
(6) H is computed in the same manner as in the sixth embodiment.
(7) G is computed in the same manner as in the sixth embodiment.
(8) As is the case with the seventh embodiment, upon each generation of one intermediate key, not on the generation of all the intermediate keys, the result of computation is stored in the storage part 260 in the corresponding bit position of ki.
The intermediate key generation part 220, the subkey generation parts 240 and 250 may be adapted to be operated under program control by the computer depicted in FIG. 22.
EFFECT OF THE INVENTION
As described above in detail, according to the present invention, the data transformation device for use in an encryption device to conceal data is designed to simultaneously meet the requirements of security and speedup, thereby ensuring security and permitting fast encryption procedure without causing a significant increase in the number of rounds. Hence, the device of the present invention suitable for use in an encryption device of the common-key cryptosystem which encrypts or decrypts data in blocks using a secret key.
Furthermore, according to the key scheduling of the present invention, even if k6, k7, k8, k9, k10 and k11 are known in the sixth and seventh embodiment, only 12bits (for example, 6th, 7th, 8th, 9th, 10th, 11th, 22nd, 23rd, 24th 25th, 26th and 27th bits) of the respective Li components are known. Thus, the problems concerning the security of the key scheduling part raised in DES and the U.S. patent issued to Miyaguchi et al. have been solved.

Claims (54)

What is claimed:
1. A data transformation device which has key storage means for storing plural pieces of key data and a plurality of cascade-connected round processing parts each composed of a nonlinear function part supplied with said plural pieces of key data to perform key-dependent nonlinear transformation, whereby input data is transformed to different data in dependence on key data, said nonlinear function part of each of said round processing parts comprising:
first key-dependent linear transformation means for linearly transforming input data to said round processing part based on first key data stored in said key storage means;
splitting means for splitting the output data from said first key-dependent linear transformation means to n pieces of subdata, said n being an integer equal to or larger than 4;
first nonlinear transformation means for nonlinearly transforming each of said n pieces of subdata;
second key-dependent linear transformation means for linearly transforming the output subdata from each of said first nonlinear transformation means based on second key data stored in said key storage means;
second nonlinear transformation means for nonlinearly transforming n pieces of output subdata from said second key-dependent linear transformation means; and
combining means for combining n pieces of output subdata from said second nonlinear transformation means to provide the output from said nonlinear function means;
wherein said second key-dependent linear transformation means contains a linear transformation layer wherein the input thereto is transformed linearly using XORs defined by an n×n matrix.
2. The data transformation device as claimed in claim 1, which further comprises:
initial splitting means for splitting said input data into two pieces of data;
nonlinear function means supplied with one of said two pieces of data;
linear operation means for causing the output data from said nonlinear function means to act on the other piece of data; and
final combining means for combining two pieces of data into a single piece of output data.
3. The data transformation device as claimed in claim 2, which further comprises initial transformation means for transforming said input data and for supplying said transformed input data to said initial splitting means.
4. The data transformation device as claimed in claim 2 or 3, which further comprises final transformation means for transforming the output data from said final combining means to provide output data from said data transformation device.
5. The data transformation device as claimed in claim 3, wherein at least one of said initial transformation means and said final transformation means is key-dependent transformation means which performs transformation based on key data stored in said key storage means.
6. The data transformation device as claimed in any one of claims 1, 2 or 3, wherein said nonlinear function part is provided with third key-dependent linear transformation means for linearly transforming the output data from said combining means based on third key data stored in said key storage means to provide the output from said nonlinear function part.
7. The data transformation device as claimed in any one of claims 1, 2 or 3, wherein said first key-dependent linear transformation means, said second key-dependent linear transformation means and/or said third key-dependent linear transformation means is linear transformation means which performs fixed linear transformation.
8. The data transformation device as claimed in any one of claims 1, 2 or 3, wherein said first nonlinear transformation means and said second nonlinear transformation means are each provided with: means for splitting the input subdata thereto into two subblocks; means for performing linear transformation and nonlinear transformation of each of said two split subblocks in cascade; and means for combining the transformed subblocks from said cascade transformation means to provide transformed output subdata corresponding to said input subdata.
9. The data transformation device as claimed in any one of claims 1, 2 or 3, wherein said n×n matrix is formed by n column vectors whose Hamming weights are equal to or larger than T−1 for a predetermined security threshold T.
10. The data transformation device as claimed in claim 9, wherein said matrix is selected from a plurality of matrix candidates which provides a maximum value of nd, said nd being the minimum number of active s-boxes.
11. The data transformation device as claimed in any one of claims 1, 2 or 3, wherein said n×n matrix is a 4×4 matrix.
12. The data transformation device as claimed in claim 11, wherein said second linear transformation means is means which inputs thereto four data A1, A2, A3 and A4 from said first nonlinear transformation means, computes
B 1=A 1 ⊕A 3 ⊕A 4
B 2=A 2 ⊕A 3 ⊕A 4
B 3=A 1 ⊕A 2 ⊕A 3
B 4=A 1 ⊕A 2 ⊕A 4
and outputs data B1, B2, B3 and B4.
13. The data transformation device as claimed in claim 12, wherein said second linear transformation means is key-dependent linear transformation means, which is also supplied with key data k2=[k21, k22, k23, k24] from said key storage means and performs XOR operations by said key data k21, k22, k23 and k24 in the computations for said output data B1, B2, B3 and B4, respectively.
14. The data transformation device as claimed in claim 11, wherein:
said first nonlinear transformation means comprises: for four pieces of m-bit subdata in1, in2, in3 and in4 from said splitting means, for transforming said in1 to 4m-bit data MI1=[A1, 00 . . . 0(2), A1, A1]; means for transforming said in2 to 4m-bit data MI2=[00 . . . 0(2), A2, A2, A2]; means for transforming said in3 to 4m-bit data MI3=[A3, A3, A3, 00 . . . 0(2)]; and means for transforming said in4 to 4m-bit data MI4=[A4, A4, 00 . . . 0(2), A4]; and
said second linear transformation means is means supplied with said data MI1, MI2, MI3 and MI4 from said first nonlinear transformation means, for computing B=MI1⊕MI2⊕MI3⊕MI4 and for outputting B=[B1, B2, B3, B4].
15. The data transformation device as claimed in claim 14, wherein said second linear transformation means is a key-dependent linear transformation means, which is also supplied with 4m-bit key data k2 from said key storage means and performs an XOR operation by said key data k2 in the computation of said B.
16. The data transformation device as claimed in any one of claims 1, 2 or 3, wherein said n×n matrix is an 8×8 matrix.
17. The data transformation device as claimed in claim 16, wherein said second linear transformation means is means which provides its eight pieces of output data B1 to B8 by obtaining four pieces of said output subdata B1, B2, B3 and B4 through XOR operations using six of eight pieces of subdata A1, A2, . . . , A8 from said first nonlinear transformation means and by obtaining four pieces of said output subdata B5, B6, B7 and B8 through XORing using five of said eight pieces of subdata from said first nonlinear transformation means.
18. The data transformation device as claimed in claim 17, wherein said second linear transformation means is key-dependent linear transformation means, which is supplied with key data k2=[k21, k22, k23, k24, k25, k26, k27, k28] stored in said key storage means and performs XOR operations by said key data k21, k22, k23, k24, k25, k26, k27 and k28 for obtaining said output subdata [B1, B2, B3, B4, B5, B6, B7, B8].
19. The data transformation device as claimed in claim 16, wherein:
said first nonlinear means is means for transforming eight pieces of m-bit subdata in1 to in8 from said splitting means to eight pieces of 8 m-bit data
MI1=[00 . . . 0(2), A1, A1, A1, A1, A1, 00 . . . 0(2), A1],
MI2=[A2, 00 . . . 0(2), A2, A2, A2, A2, A2, 00 . . . 0(2),]
MI3=[A3, A3, 00 . . . 0(2), A3, 00 . . . 0(2), A3, A3, A3],
MI4=[A4, A4, A4, 00 . . . 0(2), A4, 00 . . . 0(2), A4, A4],
MI5=[A5, 00 . . . 0(2), A5, A5, A5, 00 . . . 0(2), 00 . . . 0(2), A5],
MI6=[A6, A6, 00 . . . 0(2), A6, A6, A6, 00 . . . 0(2), 00 . . . 0(2),]
MI7=[A7, A7, A7, 00 . . . 0(2), 00 . . . 0(2), A7, A7, 00 . . . 0(2),], and
MI8=[00 . . . 0(2), A8, A8, A8, 00 . . . 0(2), 00 . . . 0(2), A8, A8]; and
said second linear transformation means is means supplied with said data MI1 to MI8 from said first nonlinear transformation means, for computing B=MI1⊕MI2⊕MI3⊕MI4⊕MI5⊕MI6⊕MI7⊕MI8 and for outputting B=[B1, B2, B3, B4, B5, B6, B7, B8].
20. The data transformation device as claimed in claim 19, wherein said second linear transformation means is key-dependent linear transformation means, which is also supplied with 8 m-bit key data k2 stored in said key storage means and performs an XOR operation by said key data k2 for obtaining said B.
21. A recording medium on which there is recorded a data transformation program by which round processing containing nonlinear function process of performing key-dependent nonlinear transformations based on plural pieces of key data stored in key storage means is executed a plurality of times in cascade to thereby transform input data to different data in dependent on key data, said nonlinear function process of said round processing comprises:
a first key-dependent linear transformation step of linearly transforming input data to a round processing part based on first key data stored in said key storage means;
a splitting step of splitting output data by said first key-dependent linear transformation step into n pieces of subdata, said n being an integer equal to or larger than 4;
a first nonlinear transformation step of nonlinearly transforming each of said n pieces of subdata;
a second key-dependent linear transformation step of performing a linear transformation using second key data and output subdata by said nonlinear transformation step;
a second nonlinear transformation step of performing a second nonlinear transformation of each of said n pieces of output subdata by said second key-dependent linear transformation step; and
combining step of combining n pieces of output subdata by said second nonlinear transformation means into a single data for outputting as the result of said nonlinear function process;
wherein said second key-dependent linear transformation step includes an XOR linear transformation step of performing, for the input thereto, XORing defined by an n×n matrix.
22. The recording medium as claimed in claim 21, wherein said data transformation program comprises:
an initial splitting step of splitting said input data into two pieces of data;
a step of performing said nonlinear function process using one of said two pieces of data as the input thereto;
a linear operation step of causing the output data by said nonlinear function processing step to act on the other piece of said data; and
a final combining step of combining two pieces of data into a single piece of output data.
23. The recording medium as claimed in claim 22, wherein said data transformation program includes an initial transformation step of transforming said input data and supplying said transformed input data to said initial splitting step.
24. The recording medium as claimed in claim 22 or 23, wherein said data transformation program includes a final transformation step of transforming the output data by said final combining step to provide output data.
25. The recording medium as claimed in claim 23, wherein at least one of said initial transformation step and said final transformation step of said data transformation program is a key-dependent transformation step of performing transformation based on key data.
26. The recording medium as claimed in any one of claims 21, 22 or 23, wherein said nonlinear function processing step includes a third key-dependent linear transformation step of linearly transforming the output data by said combining step based on third key data stored in said key storage means to provide the output of said nonlinear function processing step.
27. The recording medium as claimed in any one of claims 21, 22 or 23, wherein said first key-dependent linear transformation step, said second key-dependent linear transformation step and/or said third key-dependent linear transformation step is a linear transformation step of performing fixed linear transformation.
28. The recording medium as claimed in any one of claims 21, 22 or 23, wherein said first nonlinear transformation step and said second nonlinear transformation step are each include: a step of splitting the input data thereto into two subblocks; a step of performing linear transformation of each of said two split subblocks; a step of performing linear transformation and nonlinear transformation of each of said two split subblocks in cascade; and a step of combining the transformed subblocks by said cascade transformation step into nonlinearly transformed output data corresponding to said input data.
29. The recording medium as claimed in any one of claims 21, 22 or 23, wherein said n×n matrix is formed by n column vectors whose Hamming weights are equal to or larger than T−1 for a predetermined security threshold T.
30. The recording medium as claimed in claim 29, wherein said matrix is selected from a plurality of matrix candidates which provides a maximum value of nd, said nd being the minimum number of active s-boxes.
31. The recording medium as claimed in any one of claims 21, 22 or 23, wherein said n×n matrix is a 4×4 matrix.
32. The recording medium as claimed in claim 31, wherein said second linear transformation step is a step of inputting thereto four data A1, A2, A3 and A4 by said first nonlinear transformation step, computing
B 1=A 1A 3A 4
B 2=A 2A 3A 4
B 3=A 1A 2A 3
B 4=A 1A 2A 4
and outputting data B1, B2, B3 and B4.
33. The recording medium as claimed in claim 32, wherein said second linear transformation step is a key-dependent linear transformation step of inputting key data k2=[k21, k22, k23, k24] in said key storage means and performing XOR operations by said key data k21, k22, k23 and k24 in the computations for said output data B1, B2, B3 and B4, respectively.
34. The recording medium as claimed in claim 32, wherein:
said first nonlinear transformation step comprises: for four pieces of m-bit subdata in1, in2, in3 and in4 from said splitting means a step of transforming said in1 to 4 m-bit data MI1=[A1, 00 . . . 0(2), A1, A1]; a step of transforming said in2 to 4 m-bit data MI2=[00 . . . 0(2), A2, A2, A2]; a step of transforming said in3 to 4 m-bit data MI3=[A3, A3, A3, 00 . . . 0(2)]; and a step of transforming said in4 to 4 m-bit data MI4=[A4, A4, 00 . . . 0(2), A4]; and
said second linear transformation step is a step of inputting said data MI1, MI2, MI3 and MI4 by said first nonlinear transformation step, computing B=MI1⊕MI2⊕MI3⊕MI4 and outputting B=[B1, B2, B3, B4].
35. The recording medium as claimed in claim 34, wherein said second linear transformation step is a key-dependent linear transformation step of inputting 4m-bit key data k2 in said key storage means and performing an XOR operation by said key data k2 in the computation of said B.
36. The recording medium as claimed in any one of claims 21, 22 or 23, wherein said n×n matrix is an 8×8 matrix.
37. The recording medium as claimed in claim 36, wherein said second linear transformation step is a step of providing its eight pieces of output data B1 to B8 by obtaining four pieces of said output subdata B1, B2, B3 and B4 through XOR operations using six of eight pieces of subdata A1, A2, . . . , A8 by said first nonlinear transformation step and by obtaining four pieces of said output subdata B5, B6, B7 and B8 through XORing using five of said eight pieces of subdata by said first nonlinear transformation step.
38. The recording medium as claimed in claim 37, wherein said second linear transformation step is a key-dependent linear transformation step of inputting key data k2=[k21, k22, k23, k24, k25, k26, k27, k28] stored in said key storage means and performing XOR operations by said key data k21, k22, k23, k24, k25, k26, k27 and k28 for obtaining said output subdata [B1, B2, B3, B4, B5, B6, B7, B8].
39. The recording medium as claimed in claim 37, wherein:
said first nonlinear step is a step of transforming eight pieces of m-bit subdata in1 to in8 by said splitting means to eight pieces of 8 m-bit data
MI1=[00 . . . 0(2), A1, A1, A1, A1, A1, 00 . . . 0(2), A1],
MI2=[A2, 00 . . . 0(2), A2, A2, A2, A2, A2, 00 . . . 0(2)]
MI3=[A3, A3, 00 . . . 0(2), A3, 00 . . . 0(2), A3, A3, A3],
MI4=[A4, A4, A4, 00 . . . 0(2), A4, 00 . . . 0(2), A4, A4],
MI5=[A5, 00 . . . 0(2), A5, A5, A5, 00 . . . 0(2), 00 . . . 0(2), A5],
MI6=[A6, A6, 00 . . . 0(2), A6, A6, A6, 00 . . . 0(2), 00 . . . 0(2)]
MI7=[A7, A7, A7, 00 . . . 0(2), 00 . . . 0(2), A7, A7, 00 . . . 0(2)], and
MI8=[00 . . . 0(2), A8, A8, A8, 00 . . . 0(2), 00 . . . 0(2), A8, A8]; and
said second linear transformation step is a step of inputting said data MI1 to MI8 by said first nonlinear transformation step, computing B=MI1⊕MI2⊕MI3⊕MI4⊕MI5⊕MI6⊕MI7⊕MI8 and outputting B=[B1, B2, B3, B4, B5, B6, B7, B8].
40. The recording medium as claimed in claim 39, wherein said second linear transformation step is a key-dependent linear transformation step of inputting 8 m-bit key data k1 stored in said key storage means and performing an XOR operation by said key data k2 for obtaining said B.
41. The data transformation device as claimed in any one of claims 1, 2 or 3, which further comprises:
G-function means composed of M rounds means which are supplied with a master key K and generate intermediate values Lj+1(j=0, 1, . . . , M−1);
intermediate value storage means for temporarily storing said each intermediate value Lj from said G-function means; and
H-function means equipped with a partial information extracting function of generating N subkeys from a plurality of Lj and for storing them as said plural pieces of key data in said key storage means;
wherein:
said G-function means takes said master key as at least one part of Y0, inputs Yj and vj in the output (Lj, Yj, vj) from the j-th round, into its (j+1)-th round (where j=0, 1, . . . , M−1) diffuses the inputs and outputs Lj+1, Yj+1 and vj+1; and
said H-function means inputs i (where i=1, 2, . . . , N) and L1, L2, . . . , LM stored in said intermediate value storage means, extracts information about bit positions of subkeys ki determined by said i from said L1, . . . , LM, and outputs said subkeys, said subkeys being stored in said key storage means.
42. The data transformation device as claimed in any one of claims 1, 2 or 3, which further comprises:
G-function means composed of M rounds means which are supplied with a master key K and generate intermediate values Lj+1j=0, 1, . . . , M−1);
H-function means equipped with a partial information extracting function of generating subkeys from a plurality of Lj generated by said G-function means; and
intermediate value storage means for storing outputs from said H-function means as values corresponding to said subkeys ki;
wherein:
said G-function means takes said master key as at least one part of Y0, inputs Yj and vj in the output (Lj, Yj, vj) from the j-th round, into its (j+1)-th round, diffuses the inputs and outputs Lj+1, Yj+1 and vj+1; and
said H-function means inputs i, q and Lj (1≦i≦N, 1≦j≦M, 1≦q≦the numbers of bits ki), and extracts bit position information defined by i and q from Lj to provide information about the bit position q of the subkeys ki, said subkeys being stored as said plurality of key data in said key storage means.
43. The data transformation device as claimed in claim 41, wherein said G-function means comprises:
data splitting means for splitting the input Yj into two blocks (Yj L, Yj R) and for outputting Yj L as vj+1;
XOR means for computing Yj R⊕vj from said Yj R and said vj;
data diffusion means supplied with said Yj L and the output from said XOR means, for diffusing them and for outputting the result as Lj+1; and
data swapping means for rendering said Yj R into Yj+1 L and said Lj+1 into Yj+1 R and for concatenating said Yj+1 L and said Yj+1 R into an output Yj+1=(Yj+1 L, Yj+1 R).
44. The data transformation device as claimed in claim 41, wherein said H-function means comprises:
bit splitting means for splitting bitwise each Lj read out of said intermediate value storage means into
(t j (1) , t j (2) , . . . , t j (2N))=L j(j=1, 2, . . . , M); and
bit combining means for combining the resulting (t1 (i), t1 (N+i), t2 (i), t2 (N+i), . . . , tM (i), tM (N+i) and for outputting subkeys
k i=(t 1 (i) , t 1 (N+i) , t 2 (i) , t 2 (N+i) , . . . , t M (i) , t M (N+i)) (i=1, 2, . . . , N).
45. The data transformation device as claimed in claim 42, wherein said H-function means comprises:
bit splitting means for splitting said each Lj bitwise into
(t j (1) , t j (2) , . . . , t j (2N))=L j(j=1, 2, . . . M); and
bit combining means for combining said bits (tj (1), tj (2), . . . , tj (2N)) so that information about the bit position defined by the bit position q of ki for i becomes the bit position of ki, and for outputting subkeys
k i=(t 1 (i) , t 1 (N+i) , t 2 (i) , t 2 (N+i) , . . . t M (i) , t M (N+i)) (i=1, 2, . . . , N).
46. The data transformation device as claimed in claim 41, wherein said G-function means is means for performing the following operation:
For (Lj+1, (Yj+1, vj+1))=G(Yj, vj) (0≦j≦M−1), the output result ( ( Y j ( 1 ) , Y j ( 2 ) , Y j ( 3 ) , v j ) ( ( L j + 1 ( 1 ) , L j + 1 ( 2 ) , L j + 1 ( 3 ) , L j + 1 ( 4 ) ) , [ ( Y j + 1 ( 1 ) , Y j + 1 ( 2 ) , Y j + 1 ( 3 ) , Y j + 1 ( 4 ) ) , v j + 1 ] )
Figure US06769063-20040727-M00019
 where: Y j + 1 ( i ) = f ( Y j ( i ) )
Figure US06769063-20040727-M00020
 (i=1, 2, 3, 4) L j + 1 ( 0 ) = v j
Figure US06769063-20040727-M00021
L j + 1 ( i ) = f ( L j + 1 ( i - 1 ) ) Y j + 1 ( i )
Figure US06769063-20040727-M00022
 (i=1, 2, 3, 4) v j + 1 = L j + 1 ( 4 ) ;
Figure US06769063-20040727-M00023
and said H-function means is means for performing the following operation:
For ki=H(i, L1, L2, . . . , LM) q 4 i + j = L j + 1 ( i + 1 )
Figure US06769063-20040727-M00024
 (i=0, 1, 2, 3, 4)
(t i (0) , t i (1) , . . . , t i (7))=qi(i=0, 1, . . . , 31)
k ( i + 1 ) = ( t 0 + ( i mod2 ) ( [ i / 2 ] ) , t 2 + ( imod2 ) ( [ i / 2 ] ) , , t 30 + ( imod2 ) ( [ i / 2 ] ) )
Figure US06769063-20040727-M00025
 (i=0, 1, . . . , N−1).
47. An encryption key scheduling device for scheduling subkeys from a master key, comprising:
G-function means composed of M rounds means which are supplied with a master key K and generate intermediate values Lj (j=0, 1, . . . , M−1);
intermediate value storage means for temporarily storing said each intermediate value Lj from said G-function means; and
H-function means equipped with a partial information extracting function of generating N subkeys from a plurality of Lj;
wherein:
said G-function means takes said master key as at least one part of Y0, inputs Yj and vj in the output (Lj, Yj, vj) from the j-th round, into its (j+1)-th round (where j=0, 1, . . . , M−1) diffuses the inputs and outputs Lj+1, Yj+1 and vj+1; and
said H-function means inputs i (where i=1, 2, . . . , N) and L1, L2, . . . , LM stored in said intermediate value storage means, extracts information about bit positions of subkeys ki determined by said i from said L1, . . . , LM and outputs said subkeys.
48. An encryption key scheduling device for scheduling subkeys from a master key, comprising:
G-function means composed of M rounds means which are supplied with a master key K and generate intermediate values Lj+1(j=0, 1, . . . , M−1);
H-function means equipped with a partial information extracting function of generating subkeys from a plurality of Lj generated by said G-function means; and
intermediate value storage means for storing outputs from said H-function means as values corresponding to said subkeys ki;
wherein:
said G-function means takes said master key as at least one part of Y0, inputs Yj and vj in the output (Lj, Yj, vj) from the j-th round, into its (j+1)-th round, diffuses the inputs and outputs Lj+1, Yj+1 and vj+1; and
said H-function means inputs i, q and Lj (1≦i≦N, 1≦j≦M, 1≦q≦the numbers of bits ki), and extracts bit position information defined by i and q from Lj to provide information about the bit position q of the subkeys ki.
49. The encryption key scheduling device as claimed in claim 47 or 48, wherein said G-function means comprises:
data splitting means for splitting the input Yj into two blocks (Yj L, Yj R) and for outputting Yj L as vj+1;
XOR means for computing Yj R⊕vj from said Yj R and said vj;
data diffusion means supplied with said Yj L and the output from said XOR means, for diffusing them and for outputting the result as Lj+1; and
data swapping means for rendering said Yj R into Yj+1 L and said Lj+1 into Yj+1 R and for concatenating said Yj+1 L and said Yj+1 R into an output Yj+1=(Yj+1 L, Yj+1 R).
50. The encryption key scheduling device as claimed in claim 47, wherein said H-function means comprises:
bit splitting means for splitting bitwise each Lj read out of said intermediate value storage means into
(t j (1) , t j (2) , . . . , t j (2N))=L j (j=1, 2, . . . , M); and
bit combining means for combining the resulting (t1 (i), t1 (N+i), t2 (i), t2 (N+i), . . . , tM (i), tM (N+i)) and for outputting subkeys
k i=(t 1 (i) , t 1 (N+i) , t 2 (i) , t 2 (N+i) , . . . , t M (i) , t M (N+i)) (i=1, 2, . . . ,N).
51. The encryption key scheduling device as claimed in claim 48, wherein said H-function means comprises:
bit splitting means for splitting said each Lj bitwise into
(t j (1) , t j (2) , . . . , t j (2N))=Lj (j=1, 2, . . . , M); and
bit combining means for combining said bits (tj (1), tj (2), . . . tj (2N)) so that information about the bit position defined by the bit position q of ki for i becomes the bit position of ki, and for outputting subkeys
k i=(t 1 (i) , t 1 (N+i) , t 2 (i) , t 2 (N+i) , . . . , t M (i) , t M (N+i)) (i=1, 2, . . . , N).
52. The encryption key scheduling device as claimed in claim 47 or 48, wherein said G-function means is means for performing the following operation:
For (Lj+1, (Yj+1, vj+1))=G(Yj, vj) (0≦j≦M−1), the output result ( ( Y j ( 1 ) , Y j ( 2 ) , Y j ( 3 ) ) , v j } ( ( L j + 1 ( 1 ) , L j + 1 ( 2 ) , L j + 1 ( 3 ) , L j + 1 ( 4 ) , ) , [ ( Y j + 1 ( 1 ) , Y j + 1 ( 2 ) , Y j + 1 ( 3 ) , Y j + 1 ( 4 ) ) , v j + 1 ] )
Figure US06769063-20040727-M00026
 where: Y j + 1 ( i ) = f ( Y j ( i ) )
Figure US06769063-20040727-M00027
 (i=1, 2, 3, 4)
L j+1 (0) =v j
L j + 1 ( i ) = f ( L j + 1 ( i - 1 ) ) Y j + 1 ( i )
Figure US06769063-20040727-M00028
 (i=1, 2, 3, 4) v j + 1 = L j + 1 ( 4 ) ;
Figure US06769063-20040727-M00029
and said H-function means is means for performing the following operation:
For ki=H(i, L1, L2, . . . , LM) q 4 i + j = L j + 1 ( i + 1 )
Figure US06769063-20040727-M00030
 (i=0, 1, 2, 3)
ti (0) , t i (1) , . . . , t i (7))=q 1 (i=0, 1, . . . , 31)
k ( i + 1 ) = ( t 0 + ( i mod 2 ) ( [ i / 2 ] ) , t 2 + ( i mod 2 ) ( [ i / 2 ] ) , , t 30 + ( i mod 2 ) ( [ i / 2 ] ) ) ( i = 0 , 1 , , N - 1 ) .
Figure US06769063-20040727-M00031
53. A recording medium on which there is recorded a program for a computer to implement an encryption key scheduling device which inputs a master key K and generates therefrom a plurality of subkeys ki (i=1, . . . , N), said program comprising:
an intermediate key generation process in which said master key K as Y0 and a constant v0 are input, diffusion processing of said inputs is repeated in cascade a plurality of times and an intermediate value Lj (j=1, 2, . . . , M) is output for each diffusion processing;
a process of storing said intermediate key Lj in a storage part; and
a subkey generation process in which, upon storage of a part predetermined number of intermediate value L1 to LM in said intermediate value storage part a process in which information about bit positions of subkeys ki determined by i from said L1 to LM is extracted and said subkeys ki are generated.
54. A recording medium on which there is recorded a program for a computer to implement an encryption key scheduling device which inputs a master key K and generates therefrom a plurality of subkeys ki (i=1, . . . , N), said program comprising:
an intermediate key generation process in which said master key K as Y0 and a constant v0 are input, diffusion processing of said inputs is repeated in cascade a plurality of times and an intermediate value Lj (j=1, 2, . . . , M) is output for each diffusion processing;
a process in which, upon each generation of said intermediate value Li, information about the bit position of said Lj defined by i of said subkeys ki and the bit position q of said ki is extracted as bit position information for said ki and is stored in an intermediate value storage part; and
a process in which, upon determination of the information about each bit position of each of said subkeys ki in said storage part, said subkey ki is output.
US09/600,955 1998-01-27 1999-01-27 Data converter and recording medium on which program for executing data conversion is recorded Expired - Fee Related US6769063B1 (en)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
JP10/013573 1998-01-27
JP10/013572 1998-01-27
JP1357298 1998-01-27
JP1357398 1998-01-27
JP10147479A JP2934431B1 (en) 1998-05-28 1998-05-28 Cryptographic key schedule device and program recording medium thereof
JP10/147479 1998-05-28
PCT/JP1999/000337 WO1999038143A1 (en) 1998-01-27 1999-01-27 Data converter and recording medium on which program for executing data conversion is recorded

Publications (1)

Publication Number Publication Date
US6769063B1 true US6769063B1 (en) 2004-07-27

Family

ID=27280324

Family Applications (1)

Application Number Title Priority Date Filing Date
US09/600,955 Expired - Fee Related US6769063B1 (en) 1998-01-27 1999-01-27 Data converter and recording medium on which program for executing data conversion is recorded

Country Status (5)

Country Link
US (1) US6769063B1 (en)
EP (1) EP1052611B9 (en)
CA (1) CA2319135C (en)
DE (1) DE69931606T8 (en)
WO (1) WO1999038143A1 (en)

Cited By (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010046292A1 (en) * 2000-03-31 2001-11-29 Gligor Virgil Dorin Authentication method and schemes for data integrity protection
US20020016773A1 (en) * 2000-06-30 2002-02-07 Kenji Ohkuma Encryption apparatus and method, and decryption apparatus and method based on block encryption
US20020021801A1 (en) * 2000-07-13 2002-02-21 Takeshi Shimoyama Computing apparatus using an SPN structure in an F function and a computation method thereof
US20020106078A1 (en) * 2000-12-13 2002-08-08 Broadcom Corporation Methods and apparatus for implementing a cryptography engine
US20020108048A1 (en) * 2000-12-13 2002-08-08 Broadcom Corporation Methods and apparatus for implementing a cryptography engine
US20020106080A1 (en) * 2000-12-13 2002-08-08 Broadcom Corporation Methods and apparatus for implementing a cryptography engine
US20020116624A1 (en) * 2001-02-16 2002-08-22 International Business Machines Corporation Embedded cryptographic system
US20040044629A1 (en) * 2002-08-30 2004-03-04 Rhodes James E. License modes in call processing
US20040054930A1 (en) * 2002-08-30 2004-03-18 Walker William T. Flexible license file feature controls
US20050180565A1 (en) * 2004-02-18 2005-08-18 Harris Corporation Cryptographic device and associated methods
US20050195974A1 (en) * 2004-03-03 2005-09-08 Harris Corporation, Corporation Of The State Of Delaware Method and apparatus for data encryption
US20070094710A1 (en) * 2002-12-26 2007-04-26 Avaya Technology Corp. Remote feature activation authentication file system
US20070192864A1 (en) * 2006-02-10 2007-08-16 Bryant Eric D Software root of trust
US20070237324A1 (en) * 2006-03-15 2007-10-11 Microsoft Corporation Cryptographic processing
US20080095370A1 (en) * 2006-10-18 2008-04-24 Rose Gregory G Method for securely extending key stream to encrypt high-entropy data
US20080137837A1 (en) * 2006-08-15 2008-06-12 Sarvar Patel Encryption method for message authentication
US20090052656A1 (en) * 2005-10-10 2009-02-26 Nds Limited Method and System for Block Cipher Encryption
US20100002872A1 (en) * 2006-09-01 2010-01-07 Kyoji Shibutani Data transformation apparatus, data transformation method, and computer program
US20100014659A1 (en) * 2006-09-01 2010-01-21 Kyoji Shibutani Cryptographic processing apparatus and cryptographic processing method, and computer program
US20100061548A1 (en) * 2006-07-28 2010-03-11 Taizo Shirai Cryptographic processing apparatus, cryptographic-processing-algorithm constructing method, and cryptographic processing method, and computer program
US7681245B2 (en) 2002-08-30 2010-03-16 Avaya Inc. Remote feature activator feature extraction
US20100098242A1 (en) * 2008-10-17 2010-04-22 Qualcomm Incorporated Apparatus and method for evaluating a cipher structure's resistance to cryptanalysis
US7707405B1 (en) 2004-09-21 2010-04-27 Avaya Inc. Secure installation activation
US7747851B1 (en) 2004-09-30 2010-06-29 Avaya Inc. Certificate distribution via license files
US7814023B1 (en) * 2005-09-08 2010-10-12 Avaya Inc. Secure download manager
US20100266122A1 (en) * 2007-12-13 2010-10-21 Nec Corporation Encryption method, decryption method, device, and program
US7885896B2 (en) 2002-07-09 2011-02-08 Avaya Inc. Method for authorizing a substitute software license server
US7966520B2 (en) 2002-08-30 2011-06-21 Avaya Inc. Software licensing for spare processors
US8041642B2 (en) 2002-07-10 2011-10-18 Avaya Inc. Predictive software license balancing
US20120079462A1 (en) * 2010-09-24 2012-03-29 SoftKrypt LLC Systems and methods of source software code obfuscation
US8229858B1 (en) 2004-09-30 2012-07-24 Avaya Inc. Generation of enterprise-wide licenses in a customer environment
US20120237035A1 (en) * 2009-09-24 2012-09-20 Kabushiki Kaisha Toshiba Key scheduling device and key scheduling method
US20160156461A1 (en) * 2013-06-27 2016-06-02 Qualcomm Incorporated Method and Apparatus to Encrypt Plaintext Data
US9774443B2 (en) * 2015-03-04 2017-09-26 Apple Inc. Computing key-schedules of the AES for use in white boxes
US20180176011A1 (en) * 2016-12-16 2018-06-21 The Boeing Company Method and system for generation of cipher round keys by bit-mixers
US10608814B2 (en) * 2015-05-17 2020-03-31 Gideon Samid Equivoe-T: Transposition equivocation cryptography

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW556111B (en) * 1999-08-31 2003-10-01 Toshiba Corp Extended key generator, encryption/decryption unit, extended key generation method, and storage medium
JP5272417B2 (en) * 2008-01-21 2013-08-28 ソニー株式会社 Data conversion apparatus, data conversion method, and computer program
CN107465505B (en) 2017-08-28 2021-07-09 创新先进技术有限公司 Key data processing method and device and server

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4850019A (en) 1985-11-08 1989-07-18 Nippon Telegraph And Telephone Corporation Data randomization equipment
EP0719007A2 (en) 1994-12-22 1996-06-26 Nec Corporation Small size product cipher apparatus

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4850019A (en) 1985-11-08 1989-07-18 Nippon Telegraph And Telephone Corporation Data randomization equipment
EP0719007A2 (en) 1994-12-22 1996-06-26 Nec Corporation Small size product cipher apparatus

Non-Patent Citations (8)

* Cited by examiner, † Cited by third party
Title
A. Shimizu, et al., "Fast Data Encipherment Algorithm FEAL," Lecture Notes in Computer Science, vol. 304, (1987), p. 276-278.
Hikaru Morita et al: "FEAL-LSI and its Application" NTT Review, Telecommunications Association, Tokyo, JP, vol. 3, No. 6, Nov. 1, 1991, pp. 57-63, XP000270157 ISSN: 0915-2334.
M. Kanda, et al, A New 128-bit Block Cipher E2, Technical Report of IEICE, vol. 98, No. 227, (Sep. 30, 1998), p. 13-24 (ISEC98-12).
M. Kanda, et al. A round function structure consisting of few S-boxes (Part II), The 1998 Symposium on Cyptography and Information Security, (Jan. 28, 1998), 2.2.D, (in Japanese).
M. Kanda, et al., A round function structure consisting of few s-boxes (Part III), Technical Report of IEICE, vol. 98, No. 48, (May 15, 1998), p. 21-30 (ISEC98-3) (in Japanese).
M. Matsui, "New Structure of Block Ciphers with Provable Security Against Defferential and Linear Cryptanalysis," Lecture Notes in Computer Science, vol. 1039, (1996), p. 205-218.
Matsui M: "New Structure of Block Ciphers with Provaable Security Against Differential and Linear Cryptanalysis" Lecture Notes in Computer Science, Springer Verlag, New York, NY, US, vol. 1039, 1996, pp. 205-218,XP002914985 ISSN: 0302-9743.
V. Rijmen, et al., "The Cipher SHARK," Lecture Notes in Computer Science, vol. 1039, (1996), p. 99-111.

Cited By (65)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010046292A1 (en) * 2000-03-31 2001-11-29 Gligor Virgil Dorin Authentication method and schemes for data integrity protection
US7054445B2 (en) * 2000-03-31 2006-05-30 Vdg, Inc. Authentication method and schemes for data integrity protection
US20020016773A1 (en) * 2000-06-30 2002-02-07 Kenji Ohkuma Encryption apparatus and method, and decryption apparatus and method based on block encryption
US7305085B2 (en) * 2000-06-30 2007-12-04 Kabushiki Kaisha Toshiba Encryption apparatus and method, and decryption apparatus and method based on block encryption
US20020021801A1 (en) * 2000-07-13 2002-02-21 Takeshi Shimoyama Computing apparatus using an SPN structure in an F function and a computation method thereof
US7502463B2 (en) * 2000-12-13 2009-03-10 Broadcom Corporation Methods and apparatus for implementing a cryptography engine
US20020106080A1 (en) * 2000-12-13 2002-08-08 Broadcom Corporation Methods and apparatus for implementing a cryptography engine
US7366300B2 (en) * 2000-12-13 2008-04-29 Broadcom Corporation Methods and apparatus for implementing a cryptography engine
US20020108048A1 (en) * 2000-12-13 2002-08-08 Broadcom Corporation Methods and apparatus for implementing a cryptography engine
US7142671B2 (en) * 2000-12-13 2006-11-28 Broadcom Corporation Methods and apparatus for implementing a cryptography engine
US20020106078A1 (en) * 2000-12-13 2002-08-08 Broadcom Corporation Methods and apparatus for implementing a cryptography engine
US20020116624A1 (en) * 2001-02-16 2002-08-22 International Business Machines Corporation Embedded cryptographic system
US7885896B2 (en) 2002-07-09 2011-02-08 Avaya Inc. Method for authorizing a substitute software license server
US8041642B2 (en) 2002-07-10 2011-10-18 Avaya Inc. Predictive software license balancing
US7681245B2 (en) 2002-08-30 2010-03-16 Avaya Inc. Remote feature activator feature extraction
US20040054930A1 (en) * 2002-08-30 2004-03-18 Walker William T. Flexible license file feature controls
US20040044629A1 (en) * 2002-08-30 2004-03-04 Rhodes James E. License modes in call processing
US7966520B2 (en) 2002-08-30 2011-06-21 Avaya Inc. Software licensing for spare processors
US8620819B2 (en) 2002-08-30 2013-12-31 Avaya Inc. Remote feature activator feature extraction
US7844572B2 (en) 2002-08-30 2010-11-30 Avaya Inc. Remote feature activator feature extraction
US7707116B2 (en) 2002-08-30 2010-04-27 Avaya Inc. Flexible license file feature controls
US7698225B2 (en) 2002-08-30 2010-04-13 Avaya Inc. License modes in call processing
US20070094710A1 (en) * 2002-12-26 2007-04-26 Avaya Technology Corp. Remote feature activation authentication file system
US7890997B2 (en) 2002-12-26 2011-02-15 Avaya Inc. Remote feature activation authentication file system
US7913301B2 (en) 2002-12-26 2011-03-22 Avaya Inc. Remote feature activation authentication file system
US20050180565A1 (en) * 2004-02-18 2005-08-18 Harris Corporation Cryptographic device and associated methods
US7613295B2 (en) * 2004-02-18 2009-11-03 Harris Corporation Cryptographic device and associated methods
US7599490B2 (en) * 2004-03-03 2009-10-06 Harris Corporation Method and apparatus for data encryption
US20050195974A1 (en) * 2004-03-03 2005-09-08 Harris Corporation, Corporation Of The State Of Delaware Method and apparatus for data encryption
US7707405B1 (en) 2004-09-21 2010-04-27 Avaya Inc. Secure installation activation
US8229858B1 (en) 2004-09-30 2012-07-24 Avaya Inc. Generation of enterprise-wide licenses in a customer environment
US7747851B1 (en) 2004-09-30 2010-06-29 Avaya Inc. Certificate distribution via license files
US10503877B2 (en) 2004-09-30 2019-12-10 Avaya Inc. Generation of enterprise-wide licenses in a customer environment
US7814023B1 (en) * 2005-09-08 2010-10-12 Avaya Inc. Secure download manager
US8437470B2 (en) * 2005-10-10 2013-05-07 Nds Limited Method and system for block cipher encryption
US20090052656A1 (en) * 2005-10-10 2009-02-26 Nds Limited Method and System for Block Cipher Encryption
US20070192864A1 (en) * 2006-02-10 2007-08-16 Bryant Eric D Software root of trust
US7870399B2 (en) 2006-02-10 2011-01-11 Arxan Defense Systems Software trusted platform module and application security wrapper
US20070237324A1 (en) * 2006-03-15 2007-10-11 Microsoft Corporation Cryptographic processing
US8036379B2 (en) * 2006-03-15 2011-10-11 Microsoft Corporation Cryptographic processing
US8295478B2 (en) * 2006-07-28 2012-10-23 Sony Corporation Cryptographic processing apparatus, algorithm constructing method, processing method, and computer program applying an extended feistel structure
US20100061548A1 (en) * 2006-07-28 2010-03-11 Taizo Shirai Cryptographic processing apparatus, cryptographic-processing-algorithm constructing method, and cryptographic processing method, and computer program
US8687800B2 (en) * 2006-08-15 2014-04-01 Alcatel Lucent Encryption method for message authentication
US20080137837A1 (en) * 2006-08-15 2008-06-12 Sarvar Patel Encryption method for message authentication
US20100002872A1 (en) * 2006-09-01 2010-01-07 Kyoji Shibutani Data transformation apparatus, data transformation method, and computer program
US8731188B2 (en) 2006-09-01 2014-05-20 Sony Corporation Cryptographic processing apparatus and cryptographic processing method, and computer program
US8787568B2 (en) * 2006-09-01 2014-07-22 Sony Corporation Data transformation apparatus, data transformation method, and computer program
US20100014659A1 (en) * 2006-09-01 2010-01-21 Kyoji Shibutani Cryptographic processing apparatus and cryptographic processing method, and computer program
US8165288B2 (en) * 2006-09-01 2012-04-24 Sony Corporation Cryptographic processing apparatus and cryptographic processing method, and computer program
TWI394418B (en) * 2006-09-01 2013-04-21 Sony Corp A cryptographic processing device, a cryptographic processing method, and a non-temporary computer readable recording medium
US8213607B2 (en) * 2006-10-18 2012-07-03 Qualcomm Incorporated Method for securely extending key stream to encrypt high-entropy data
US20080095370A1 (en) * 2006-10-18 2008-04-24 Rose Gregory G Method for securely extending key stream to encrypt high-entropy data
US8619976B2 (en) * 2007-12-13 2013-12-31 Nec Corporation Encryption method, decryption method, device, and program
US20100266122A1 (en) * 2007-12-13 2010-10-21 Nec Corporation Encryption method, decryption method, device, and program
US20100098242A1 (en) * 2008-10-17 2010-04-22 Qualcomm Incorporated Apparatus and method for evaluating a cipher structure's resistance to cryptanalysis
US8098816B2 (en) * 2008-10-17 2012-01-17 Qualcomm Incorporated Apparatus and method for evaluating a cipher structure's resistance to cryptanalysis
US20120237035A1 (en) * 2009-09-24 2012-09-20 Kabushiki Kaisha Toshiba Key scheduling device and key scheduling method
US8995666B2 (en) * 2009-09-24 2015-03-31 Kabushiki Kaisha Toshiba Key scheduling device and key scheduling method
US20120079462A1 (en) * 2010-09-24 2012-03-29 SoftKrypt LLC Systems and methods of source software code obfuscation
US20160156461A1 (en) * 2013-06-27 2016-06-02 Qualcomm Incorporated Method and Apparatus to Encrypt Plaintext Data
US9712319B2 (en) * 2013-06-27 2017-07-18 Qualcomm Incorporated Method and apparatus to encrypt plaintext data
US9774443B2 (en) * 2015-03-04 2017-09-26 Apple Inc. Computing key-schedules of the AES for use in white boxes
US10608814B2 (en) * 2015-05-17 2020-03-31 Gideon Samid Equivoe-T: Transposition equivocation cryptography
US20180176011A1 (en) * 2016-12-16 2018-06-21 The Boeing Company Method and system for generation of cipher round keys by bit-mixers
US10742405B2 (en) * 2016-12-16 2020-08-11 The Boeing Company Method and system for generation of cipher round keys by bit-mixers

Also Published As

Publication number Publication date
EP1052611A1 (en) 2000-11-15
DE69931606T8 (en) 2007-06-28
CA2319135A1 (en) 1999-07-29
EP1052611A4 (en) 2003-08-06
DE69931606T2 (en) 2007-03-08
WO1999038143A1 (en) 1999-07-29
EP1052611B1 (en) 2006-05-31
DE69931606D1 (en) 2006-07-06
CA2319135C (en) 2003-06-17
EP1052611B9 (en) 2007-02-14

Similar Documents

Publication Publication Date Title
US6769063B1 (en) Data converter and recording medium on which program for executing data conversion is recorded
US6298136B1 (en) Cryptographic method and apparatus for non-linearly merging a data block and a key
Massey SAFER K-64: A byte-oriented block-ciphering algorithm
US5442705A (en) Hardware arrangement for enciphering bit blocks while renewing a key at each iteration
JP4869452B2 (en) Cryptographic message authentication code generation method
US20120191986A1 (en) Cryptographic processing apparatus and cryptographic processing method, and computer program
JP2002366029A (en) Encipherment safe against dpa(differential power analysis)
Jaffe A first-order DPA attack against AES in counter mode with unknown initial counter
CN111431697A (en) Novel method for realizing lightweight block cipher COR L
Shorin et al. Linear and differential cryptanalysis of Russian GOST
EP1059760A1 (en) Method for the block-encryption of discrete data
JP4673857B2 (en) Method for generating pseudo-random sequences
US7103180B1 (en) Method of implementing the data encryption standard with reduced computation
JPH0697930A (en) Block cipher processor
EP1087425A1 (en) Method for the cryptographic conversion of binary data blocks
EP1001398B1 (en) Ciphering apparatus
JPH1124558A (en) Ciphering device
JP6089668B2 (en) ENCRYPTION PROCESSING CIRCUIT, DECRYPTION PROCESSING CIRCUIT, METHOD THEREOF, AND PROGRAM THEREOF
KR100350207B1 (en) Method for cryptographic conversion of l-bit input blocks of digital data into l-bit output blocks
JPH09269727A (en) Ciphering method and ciphering device
CA2421142C (en) Data transformation device and recording medium having recorded thereon a program for implementing the same
JP3017725B2 (en) Data converter
JP3017726B2 (en) Data converter
Henricksen Tiny Dragon-an encryption algorithm for wireless sensor networks
Kumar et al. Block cipher using key based random permutations and key based random substitutions

Legal Events

Date Code Title Description
AS Assignment

Owner name: NIPPON TELEGRAPH AND TELEPHONE CORPORATION, JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KANDA, MASAYUKI;TAKASHIMA, YOUICHI;AOKI, KAZUMARO;AND OTHERS;REEL/FRAME:011010/0447

Effective date: 20000711

CC Certificate of correction
FPAY Fee payment

Year of fee payment: 4

FPAY Fee payment

Year of fee payment: 8

REMI Maintenance fee reminder mailed
LAPS Lapse for failure to pay maintenance fees
STCH Information on status: patent discontinuation

Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362

FP Lapsed due to failure to pay maintenance fee

Effective date: 20160727