DE3275771D1 - Data processing system with guest architectural support - Google Patents

Data processing system with guest architectural support

Info

Publication number
DE3275771D1
DE3275771D1 DE8282104713T DE3275771T DE3275771D1 DE 3275771 D1 DE3275771 D1 DE 3275771D1 DE 8282104713 T DE8282104713 T DE 8282104713T DE 3275771 T DE3275771 T DE 3275771T DE 3275771 D1 DE3275771 D1 DE 3275771D1
Authority
DE
Germany
Prior art keywords
data processing
processing system
architectural support
guest
guest architectural
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282104713T
Other languages
English (en)
Inventor
Iii Robert Jackson Bullions
Iii Thomas Oscar Curlee
Peter Hermon Gum
Bruce Lloyd Mcgilvray
Ethel Louise Richardson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3275771D1 publication Critical patent/DE3275771D1/de
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1027Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1045Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
    • G06F12/1063Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache the data cache being concurrently virtually addressed
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • G06F2009/45566Nested virtual machines
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • G06F2009/45583Memory management, e.g. access or allocation
DE8282104713T 1981-06-15 1982-05-28 Data processing system with guest architectural support Expired DE3275771D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/273,532 US4456954A (en) 1981-06-15 1981-06-15 Virtual machine system with guest architecture emulation using hardware TLB's for plural level address translations

Publications (1)

Publication Number Publication Date
DE3275771D1 true DE3275771D1 (en) 1987-04-23

Family

ID=23044327

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282104713T Expired DE3275771D1 (en) 1981-06-15 1982-05-28 Data processing system with guest architectural support

Country Status (7)

Country Link
US (1) US4456954A (de)
EP (1) EP0067344B1 (de)
JP (1) JPS57212680A (de)
AU (1) AU547403B2 (de)
CA (1) CA1176377A (de)
DE (1) DE3275771D1 (de)
ES (1) ES511808A0 (de)

Families Citing this family (160)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58180990U (ja) * 1982-05-28 1983-12-02 古河鉱業株式会社 泥岩さく孔用ロツド
US5109522A (en) * 1983-06-02 1992-04-28 Amdahl Corporation Data processing system with logical processing facility supporting a plurality of system control programs for production operation
JPS608971A (ja) * 1983-06-29 1985-01-17 Toshiba Corp 中央処理装置
US4612612A (en) * 1983-08-30 1986-09-16 Amdahl Corporation Virtually addressed cache
JPS6057438A (ja) * 1983-09-08 1985-04-03 Hitachi Ltd 仮想計算機システム制御装置
US4564903A (en) * 1983-10-05 1986-01-14 International Business Machines Corporation Partitioned multiprocessor programming system
JPS60107156A (ja) * 1983-11-16 1985-06-12 Hitachi Ltd デ−タ処理システム
US4779188A (en) * 1983-12-14 1988-10-18 International Business Machines Corporation Selective guest system purge control
CA1213986A (en) * 1983-12-14 1986-11-12 Thomas O. Curlee, Iii Selective guest system purge control
JPS60142451A (ja) * 1983-12-29 1985-07-27 Fujitsu Ltd アドレス変換制御方式
JPH0619747B2 (ja) * 1984-01-18 1994-03-16 株式会社日立製作所 I/o命令実行方法、i/o割込処理方法およびそれらを用いた計算機システム
US5392409A (en) * 1984-01-18 1995-02-21 Hitachi, Ltd. I/O execution method for a virtual machine system and system therefor
GB8405491D0 (en) * 1984-03-02 1984-04-04 Hemdal G Computers
US4691278A (en) * 1984-04-23 1987-09-01 Nec Corporation Data processor executing microprograms according to a plurality of system architectures
US4603235A (en) * 1984-05-21 1986-07-29 Gte Communication Systems Corporation Dynamic event selection network
US4792895A (en) * 1984-07-30 1988-12-20 International Business Machines Corp. Instruction processing in higher level virtual machines by a real machine
US4695950A (en) * 1984-09-17 1987-09-22 International Business Machines Corporation Fast two-level dynamic address translation method and means
JPH0652511B2 (ja) * 1984-12-14 1994-07-06 株式会社日立製作所 情報処理装置のアドレス変換方式
US4975836A (en) * 1984-12-19 1990-12-04 Hitachi, Ltd. Virtual computer system
US4674038A (en) * 1984-12-28 1987-06-16 International Business Machines Corporation Recovery of guest virtual machines after failure of a host real machine
DE3689287T2 (de) * 1985-02-18 1994-05-26 Nec Corp Datenverarbeitungsgerät.
JPS61190638A (ja) * 1985-02-20 1986-08-25 Hitachi Ltd 仮想計算機のフアイル制御方式
US5255384A (en) * 1985-02-22 1993-10-19 Intergraph Corporation Memory address translation system having modifiable and non-modifiable translation mechanisms
US4649479A (en) * 1985-02-28 1987-03-10 International Business Machines Corp. Device driver and adapter binding technique
JPS61206043A (ja) * 1985-03-11 1986-09-12 Hitachi Ltd 仮想計算機システムにおける割込制御方法
JPS61206057A (ja) * 1985-03-11 1986-09-12 Hitachi Ltd アドレス変換装置
JP2539357B2 (ja) 1985-03-15 1996-10-02 株式会社日立製作所 デ−タ処理装置
US4737909A (en) * 1985-04-01 1988-04-12 National Semiconductor Corp. Cache memory address apparatus
US4660144A (en) * 1985-05-23 1987-04-21 International Business Machines Corp. Adjunct machine
JPH0685156B2 (ja) * 1985-05-24 1994-10-26 株式会社日立製作所 アドレス変換装置
JPH0792761B2 (ja) * 1985-07-31 1995-10-09 株式会社日立製作所 仮想計算機システムの入出力制御方法
JPH0658649B2 (ja) * 1985-10-28 1994-08-03 株式会社日立製作所 仮想記憶装置における領域管理方法
JPS62154037A (ja) * 1985-12-26 1987-07-09 Hitachi Ltd 仮想計算機監視制御方式
US4742447A (en) * 1986-01-16 1988-05-03 International Business Machines Corporation Method to control I/O accesses in a multi-tasking virtual memory virtual machine type data processing system
JPH0658650B2 (ja) * 1986-03-14 1994-08-03 株式会社日立製作所 仮想計算機システム
US5349672A (en) * 1986-03-17 1994-09-20 Hitachi, Ltd. Data processor having logical address memories and purge capabilities
US4862347A (en) * 1986-04-22 1989-08-29 International Business Machine Corporation System for simulating memory arrays in a logic simulation machine
US5113517A (en) * 1986-04-28 1992-05-12 Xerox Corporation Concurrent display of data from two different processors each having different display font and user interface for controlling transfer of converted font data therebetween
US5088033A (en) * 1986-04-28 1992-02-11 Xerox Corporation Data processing system emulation in a window with a coprocessor and I/O emulation
US4899136A (en) * 1986-04-28 1990-02-06 Xerox Corporation Data processor having a user interface display with metaphoric objects
US4920481A (en) * 1986-04-28 1990-04-24 Xerox Corporation Emulation with display update trapping
US4939507A (en) * 1986-04-28 1990-07-03 Xerox Corporation Virtual and emulated objects for use in the user interface of a display screen of a display processor
US5153577A (en) * 1986-04-28 1992-10-06 Xerox Corporation Mapping character color attributes into grey pixel patterns
US4937036A (en) * 1986-04-28 1990-06-26 Xerox Corporation Concurrent display of data from two different display processors and user interface therefore
US4797814A (en) * 1986-05-01 1989-01-10 International Business Machines Corporation Variable address mode cache
US5038281A (en) * 1986-09-19 1991-08-06 International Business Machines Corporation Acceleration of system interrupts between operating systems in guest-host relationship
JPH0810437B2 (ja) * 1987-05-11 1996-01-31 株式会社日立製作所 仮想計算機システムのゲスト実行制御方式
US5218712A (en) * 1987-07-01 1993-06-08 Digital Equipment Corporation Providing a data processor with a user-mode accessible mode of operations in which the processor performs processing operations without interruption
JP2523653B2 (ja) * 1987-07-08 1996-08-14 株式会社日立製作所 仮想計算機システム
JP2510605B2 (ja) * 1987-07-24 1996-06-26 株式会社日立製作所 仮想計算機システム
US4843541A (en) * 1987-07-29 1989-06-27 International Business Machines Corporation Logical resource partitioning of a data processing system
US4975869A (en) * 1987-08-06 1990-12-04 International Business Machines Corporation Fast emulator using slow processor
JP2615103B2 (ja) * 1987-12-11 1997-05-28 株式会社日立製作所 仮想計算機システム
US4943913A (en) * 1988-02-10 1990-07-24 International Business Machines Corporation Operating system accessing control blocks by using home address space segment table to control instruction and operand fetch and store operations
JPH01255945A (ja) * 1988-04-06 1989-10-12 Hitachi Ltd 仮想計算機におけるアドレス変換装置
JPH02202652A (ja) * 1989-02-01 1990-08-10 Hitachi Ltd 多重仮想記憶管理方式
IT1228728B (it) * 1989-03-15 1991-07-03 Bull Hn Information Syst Sistema multiprocessore con replicazione di dati globali e due livelli di unita' di traduzione indirizzi.
US5293612A (en) * 1989-05-11 1994-03-08 Tandem Computers Incorporated Selective dump method and apparatus
US5155809A (en) * 1989-05-17 1992-10-13 International Business Machines Corp. Uncoupling a central processing unit from its associated hardware for interaction with data handling apparatus alien to the operating system controlling said unit and hardware
JP2825550B2 (ja) * 1989-09-21 1998-11-18 株式会社日立製作所 多重仮想空間アドレス制御方法および計算機システム
US5469556A (en) * 1989-12-12 1995-11-21 Harris Corporation Resource access security system for controlling access to resources of a data processing system
JPH03217949A (ja) * 1990-01-23 1991-09-25 Hitachi Ltd 計算機システム
JP2708608B2 (ja) * 1990-05-25 1998-02-04 富士通株式会社 仮想計算機のipl処理方式
JP2839201B2 (ja) * 1990-07-30 1998-12-16 株式会社日立製作所 仮想計算機システム
US5283876A (en) * 1990-10-05 1994-02-01 Bull Hn Information Systems Inc. Virtual memory unit utilizing set associative memory structure and state machine control sequencing with selective retry
US5317754A (en) * 1990-10-23 1994-05-31 International Business Machines Corporation Method and apparatus for enabling an interpretive execution subset
US5381535A (en) * 1990-10-24 1995-01-10 International Business Machines Corporation Data processing control of second-level quest virtual machines without host intervention
US5317705A (en) * 1990-10-24 1994-05-31 International Business Machines Corporation Apparatus and method for TLB purge reduction in a multi-level machine system
US5412787A (en) * 1990-11-21 1995-05-02 Hewlett-Packard Company Two-level TLB having the second level TLB implemented in cache tag RAMs
AU651453B2 (en) * 1991-03-07 1994-07-21 Digital Equipment Corporation Improved software debugging system and method especially adapted for code debugging within a multi-architecture environment
US5652869A (en) * 1991-03-07 1997-07-29 Digital Equipment Corporation System for executing and debugging multiple codes in a multi-architecture environment using jacketing means for jacketing the cross-domain calls
US5341485A (en) * 1991-05-07 1994-08-23 International Business Machines Corporation Multiple virtual address translation per computer cycle
JPH0512126A (ja) * 1991-07-05 1993-01-22 Hitachi Ltd 仮想計算機のアドレス変換装置及びアドレス変換方法
US5428757A (en) * 1992-04-29 1995-06-27 International Business Machines Corporation Method for reducing translation look aside buffer purges in a multitasking system
JPH0695898A (ja) * 1992-09-16 1994-04-08 Hitachi Ltd 仮想計算機の制御方法および仮想計算機システム
US5584042A (en) * 1993-06-01 1996-12-10 International Business Machines Corporation Dynamic I/O data address relocation facility
JPH06348584A (ja) * 1993-06-01 1994-12-22 Internatl Business Mach Corp <Ibm> データ処理システム
US5379432A (en) * 1993-07-19 1995-01-03 Taligent, Inc. Object-oriented interface for a procedural operating system
US5404529A (en) * 1993-07-19 1995-04-04 Taligent, Inc. Object-oriented interprocess communication system interface for a procedural operating system
US5455951A (en) * 1993-07-19 1995-10-03 Taligent, Inc. Method and apparatus for running an object-oriented program on a host computer with a procedural operating system
US6684261B1 (en) * 1993-07-19 2004-01-27 Object Technology Licensing Corporation Object-oriented operating system
US5555385A (en) * 1993-10-27 1996-09-10 International Business Machines Corporation Allocation of address spaces within virtual machine compute system
US5781750A (en) * 1994-01-11 1998-07-14 Exponential Technology, Inc. Dual-instruction-set architecture CPU with hidden software emulation mode
JP2806778B2 (ja) * 1994-01-28 1998-09-30 甲府日本電気株式会社 変換索引バッファクリア命令処理方式
US5664156A (en) * 1994-09-16 1997-09-02 Philips Electronics North America Corporation Microcontroller with a reconfigurable program status word
US5555414A (en) * 1994-12-14 1996-09-10 International Business Machines Corporation Multiprocessing system including gating of host I/O and external enablement to guest enablement at polling intervals
JPH08286932A (ja) * 1995-04-11 1996-11-01 Hitachi Ltd ジョブの並列実行制御方法
JP3451595B2 (ja) * 1995-06-07 2003-09-29 インターナショナル・ビジネス・マシーンズ・コーポレーション 二つの別個の命令セット・アーキテクチャへの拡張をサポートすることができるアーキテクチャ・モード制御を備えたマイクロプロセッサ
US6356918B1 (en) 1995-07-26 2002-03-12 International Business Machines Corporation Method and system for managing registers in a data processing system supports out-of-order and speculative instruction execution
US5764944A (en) * 1995-09-08 1998-06-09 United Microelectronics Corp. Method and apparatus for TLB invalidation mechanism for protective page fault
JPH0981459A (ja) * 1995-09-19 1997-03-28 Hitachi Ltd アドレス変換バッファ装置
US5787492A (en) * 1996-04-09 1998-07-28 International Business Machines Corporation Address limit check apparatus with conditional carry logic
US6047388A (en) * 1997-04-09 2000-04-04 International Business Machines Corporation Method and apparatus for processing an invalid address request
US6668314B1 (en) * 1997-06-24 2003-12-23 Hewlett-Packard Development Company, L.P. Virtual memory translation control by TLB purge monitoring
US6397242B1 (en) 1998-05-15 2002-05-28 Vmware, Inc. Virtualization system including a virtual machine monitor for a computer with a segmented architecture
US7516453B1 (en) * 1998-10-26 2009-04-07 Vmware, Inc. Binary translator with precise exception synchronization mechanism
JP2001051900A (ja) * 1999-08-17 2001-02-23 Hitachi Ltd 仮想計算機方式の情報処理装置及びプロセッサ
FR2797970A1 (fr) * 1999-08-31 2001-03-02 Koninkl Philips Electronics Nv Adressage d'une memoire
US6415379B1 (en) * 1999-10-13 2002-07-02 Transmeta Corporation Method and apparatus for maintaining context while executing translated instructions
US6651132B1 (en) * 2000-07-17 2003-11-18 Microsoft Corporation System and method for emulating the operation of a translation look-aside buffer
US7149878B1 (en) * 2000-10-30 2006-12-12 Mips Technologies, Inc. Changing instruction set architecture mode by comparison of current instruction execution address with boundary address register values
US6742180B1 (en) * 2000-10-30 2004-05-25 Microsoft Corporation System and method providing seamless transition of operating system environment
US6907600B2 (en) 2000-12-27 2005-06-14 Intel Corporation Virtual translation lookaside buffer
DE10104984A1 (de) * 2001-02-03 2002-08-08 Hejoe Ges Fuer Netzwerk Und Sy System aus miteinander verbundenen Digitalrechnern und Verfahren zur Steuerung
US7107439B2 (en) * 2001-08-10 2006-09-12 Mips Technologies, Inc. System and method of controlling software decompression through exceptions
US7069413B1 (en) 2003-01-29 2006-06-27 Vmware, Inc. Method and system for performing virtual to physical address translations in a virtual machine monitor
US6981125B2 (en) * 2003-04-22 2005-12-27 International Business Machines Corporation Method and apparatus for managing shared virtual storage in an information handling system
CA2525578A1 (en) 2003-05-15 2004-12-02 Applianz Technologies, Inc. Systems and methods of creating and accessing software simulated computers
US20050034125A1 (en) * 2003-08-05 2005-02-10 Logicube, Inc. Multiple virtual devices
US20060005190A1 (en) * 2004-06-30 2006-01-05 Microsoft Corporation Systems and methods for implementing an operating system in a virtual machine environment
US9058292B2 (en) * 2004-12-29 2015-06-16 Intel Corporation System and method for one step address translation of graphics addresses in virtualization
US7886126B2 (en) 2005-01-14 2011-02-08 Intel Corporation Extended paging tables to map guest physical memory addresses from virtual memory page tables to host physical memory addresses in a virtual machine system
US7299337B2 (en) * 2005-05-12 2007-11-20 Traut Eric P Enhanced shadow page table algorithms
US7496495B2 (en) * 2005-05-12 2009-02-24 Microsoft Corporation Virtual operating system device communication relying on memory access violations
US20070006178A1 (en) * 2005-05-12 2007-01-04 Microsoft Corporation Function-level just-in-time translation engine with multiple pass optimization
US7868897B2 (en) 2006-06-30 2011-01-11 Intel Corporation Apparatus and method for memory address re-mapping of graphics data
US7881921B1 (en) * 2006-07-05 2011-02-01 Synopsys, Inc. Caching information to map simulation addresses to host addresses in computer system simulations
US7555628B2 (en) * 2006-08-15 2009-06-30 Intel Corporation Synchronizing a translation lookaside buffer to an extended paging table
US8819647B2 (en) * 2008-01-25 2014-08-26 International Business Machines Corporation Performance improvements for nested virtual machines
US7530106B1 (en) 2008-07-02 2009-05-05 Kaspersky Lab, Zao System and method for security rating of computer processes
US8275971B2 (en) * 2008-08-27 2012-09-25 International Business Machines Corporation Method and apparatus for managing software controlled cache of translating the physical memory access of a virtual machine between different levels of translation entities
US7904914B2 (en) 2008-09-30 2011-03-08 Microsoft Corporation On-the-fly replacement of physical hardware with emulation
US10802990B2 (en) * 2008-10-06 2020-10-13 International Business Machines Corporation Hardware based mandatory access control
US10255463B2 (en) * 2008-11-17 2019-04-09 International Business Machines Corporation Secure computer architecture
US8301863B2 (en) * 2008-11-17 2012-10-30 International Business Machines Corporation Recursive logical partition real memory map
US8135937B2 (en) * 2008-11-17 2012-03-13 International Business Machines Corporation Logical partition memory
US8387031B2 (en) * 2009-01-23 2013-02-26 International Business Machines Corporation Providing code improvements for nested virtual machines
US8286164B2 (en) 2009-08-07 2012-10-09 International Business Machines Corporation Secure recursive virtualization
US20130115844A1 (en) 2010-07-16 2013-05-09 Nitto Denko Corporation Electrically insulating resin composition and laminate sheet
US9251091B2 (en) 2012-06-15 2016-02-02 International Business Machines Corporation Translation look-aside table management
US9355032B2 (en) 2012-10-08 2016-05-31 International Business Machines Corporation Supporting multiple types of guests by a hypervisor
US9600419B2 (en) 2012-10-08 2017-03-21 International Business Machines Corporation Selectable address translation mechanisms
US9348757B2 (en) 2012-10-08 2016-05-24 International Business Machines Corporation System supporting multiple partitions with differing translation formats
US9280488B2 (en) 2012-10-08 2016-03-08 International Business Machines Corporation Asymmetric co-existent address translation structure formats
US9355040B2 (en) 2012-10-08 2016-05-31 International Business Machines Corporation Adjunct component to provide full virtualization using paravirtualized hypervisors
US9740624B2 (en) 2012-10-08 2017-08-22 International Business Machines Corporation Selectable address translation mechanisms within a partition
US9213569B2 (en) 2014-03-27 2015-12-15 International Business Machines Corporation Exiting multiple threads in a computer
US9223574B2 (en) * 2014-03-27 2015-12-29 International Business Machines Corporation Start virtual execution instruction for dispatching multiple threads in a computer
US9195493B2 (en) * 2014-03-27 2015-11-24 International Business Machines Corporation Dispatching multiple threads in a computer
US9772867B2 (en) 2014-03-27 2017-09-26 International Business Machines Corporation Control area for managing multiple threads in a computer
JP2017527019A (ja) 2014-07-25 2017-09-14 インテル・コーポレーション 命令セットアグノスティックランタイムアーキテクチャのためのシステム
US11281481B2 (en) 2014-07-25 2022-03-22 Intel Corporation Using a plurality of conversion tables to implement an instruction set agnostic runtime architecture
US10353680B2 (en) 2014-07-25 2019-07-16 Intel Corporation System converter that implements a run ahead run time guest instruction conversion/decoding process and a prefetching process where guest code is pre-fetched from the target of guest branches in an instruction sequence
US9733909B2 (en) 2014-07-25 2017-08-15 Intel Corporation System converter that implements a reordering process through JIT (just in time) optimization that ensures loads do not dispatch ahead of other loads that are to the same address
US9389897B1 (en) 2014-12-18 2016-07-12 International Business Machines Corporation Exiting multiple threads of a simulation environment in a computer
JP6678185B2 (ja) * 2015-04-10 2020-04-08 グーグル エルエルシー ネイティブ・クライアントへのバイナリ変換
US10168902B2 (en) 2016-07-18 2019-01-01 International Business Machines Corporation Reducing purging of structures associated with address translation
US10169243B2 (en) 2016-07-18 2019-01-01 International Business Machines Corporation Reducing over-purging of structures associated with address translation
US10241924B2 (en) 2016-07-18 2019-03-26 International Business Machines Corporation Reducing over-purging of structures associated with address translation using an array of tags
US10176111B2 (en) 2016-07-18 2019-01-08 International Business Machines Corporation Host page management using active guest page table indicators
US10248573B2 (en) 2016-07-18 2019-04-02 International Business Machines Corporation Managing memory used to back address translation structures
US10802986B2 (en) 2016-07-18 2020-10-13 International Business Machines Corporation Marking to indicate memory used to back address translation structures
US10176006B2 (en) 2016-07-18 2019-01-08 International Business Machines Corporation Delaying purging of structures associated with address translation
US10223281B2 (en) 2016-07-18 2019-03-05 International Business Machines Corporation Increasing the scope of local purges of structures associated with address translation
US10180909B2 (en) 2016-07-18 2019-01-15 International Business Machines Corporation Host-based resetting of active use of guest page table indicators
US10282305B2 (en) 2016-07-18 2019-05-07 International Business Machines Corporation Selective purging of entries of structures associated with address translation in a virtualized environment
US10162764B2 (en) 2016-07-18 2018-12-25 International Business Machines Corporation Marking page table/page status table entries to indicate memory used to back address translation structures
US10176110B2 (en) 2016-07-18 2019-01-08 International Business Machines Corporation Marking storage keys to indicate memory used to back address translation structures
US11347869B2 (en) * 2019-03-08 2022-05-31 International Business Machines Corporation Secure interface control high-level page management
US11403409B2 (en) 2019-03-08 2022-08-02 International Business Machines Corporation Program interruptions for page importing/exporting

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR130806A (de) * 1973-11-21
US4351024A (en) * 1975-04-21 1982-09-21 Honeywell Information Systems Inc. Switch system base mechanism
FR2400729A1 (fr) * 1977-08-17 1979-03-16 Cii Honeywell Bull Dispositif pour la transformation d'adresses virtuelles en adresses physiques dans un systeme de traitement de donnees
US4285040A (en) * 1977-11-04 1981-08-18 Sperry Corporation Dual mode virtual-to-real address translation mechanism
US4241401A (en) * 1977-12-19 1980-12-23 Sperry Corporation Virtual address translator utilizing interrupt level code
JPS5576447A (en) * 1978-12-01 1980-06-09 Fujitsu Ltd Address control system for software simulation
US4253145A (en) * 1978-12-26 1981-02-24 Honeywell Information Systems Inc. Hardware virtualizer for supporting recursive virtual computer systems on a host computer system
JPS55112651A (en) * 1979-02-21 1980-08-30 Fujitsu Ltd Virtual computer system

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ES8304331A1 (es) 1983-02-16
AU8341582A (en) 1982-12-23
AU547403B2 (en) 1985-10-17
EP0067344A3 (en) 1984-05-02
ES511808A0 (es) 1983-02-16
JPS6122825B2 (de) 1986-06-03
EP0067344B1 (de) 1987-03-18
EP0067344A2 (de) 1982-12-22
JPS57212680A (en) 1982-12-27
CA1176377A (en) 1984-10-16
US4456954A (en) 1984-06-26

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