CN1342007A

CN1342007A - New scrambler

Info

Publication number: CN1342007A
Application number: CN 00117409
Authority: CN
Inventors: 周玉洁; 张苏民
Original assignee: ZHONGXING INTEGRATED CIRCUIT DESIGN CO Ltd SHENZHEN CITY
Current assignee: ZTE Corp
Priority date: 2000-09-05
Filing date: 2000-09-05
Publication date: 2002-03-27
Anticipated expiration: 2020-09-05
Also published as: CN1219382C

Abstract

The invention relates to a enciphering device that consists of CPU and accelerator as main body as well as including programmable I/O interface, check register, reset controller, random number generator, chip ID, security protection unit, shared memory module and storage area of enciphering and deciphering subroutine. The invention has solved the shortcomings presented in one board enciphering system, enhanced capability against engineering tracking. It meets the strict requirements of information transmission and information system in information security area.

Description

A kind of new encryption device

The present invention relates to safety information product and information system security field, specifically, relate to the encryption device that solves information security in the fields such as ecommerce, Internet network, virtual private network application.

Information security under information security, the particularly network environment has become influences that national security, economic development, individual are terrible, the significant problem of social stability.From protecting country and personal interests, national governments do not have the information of thinking little of and network security, and particularly each developed country all strengthens the research and the inspection of information security energetically.Recently, the U.S. is formulating new data encryption standard option A ES, in order to replace the DES that releases the seventies.Each big trans-corporation such as IBM, HP, Sun etc. all have powerful information security laboratory.National security and national interest from China, it is not all right not studying the network information security issue, the security breaches that content just to disperse, found with shutoff are that the research of purpose is also not all right, and must set about from the basis, information security under the network environment is carried out deep research, for the information security of China provides brand-new, the whole theoretical direction and the support of basic component, and establish solid foundation for the realization of information security technology.

Network environment has proposed many new challenges to information security, and in the multiple technologies means that ensure information safety, information encryption and password are the important means that guarantees the network information security.At first, network calculations provides strong tool for cryptanalysis, makes the research of basic theories such as the cryptography research under the network environment, high-intensity cipher theory, enciphering and deciphering algorithm at a high speed, parallel cryptographic attack algorithm obtain remarkable progress; Secondly, to the authentication of the user characteristics under the network environment, colony's digital signature, Study on Technology such as cryptographic algorithm and multilateral accord has also had breakthrough in many ways.Therefore how to guarantee confidentiality, integrality, validity and the controllability of message transmission in the network, become the information security field important research project.The confidentiality of information is meant information data in transmission course, can not be stolen a glance at by the unauthorized person; Information integrity is meant that information data can not illegally be distorted in transmission course; The validity of information is meant that information data can not be denied; Controllability is meant that legal entity can carry out legal monitoring to information and information system.Adopt symmetry and asymmetrical cryptographic algorithm and derivative algorithm, reinforcement is to key management and take the correlation technique measure, can effectively realize the every requirement to the transfer of data confidence level.

Because the particularity of safety information product, safety information product directly relates to national interests, safety and sovereignty, and it is more strict that national governments will compare other products to the requirement of information products, information system security.To the core technology in information technology and the information security technology, directly control by government, as cryptographic technique and password product, most developed countries are strictly control all, even government allows the password product of outlet, its key technology still is controlled in government's hand, as U.S. government the key length that exports to Chinese security product is limited, Chinese Government uses external password product for security consideration also limits simultaneously, so must develop autonomous cryptographic algorithm product at home.

Domestic have many companies to release a series of data encryption product, for the user provides the safety product of a series of client and server end, for Development of E-business provides certain safety assurance.The data encryption product is as the part of safety information product, and except the various cryptographic algorithm that high-strength anti-attack ability is arranged, the realization of hardware is significant, and good hardware designs can improve the security performance of whole system.But because the restriction of existing hardware condition; the realization of all these class security product hardware all is the form appearance with veneer; its structure as shown in Figure 1; described encryption veneer comprises cryptographic calculation coprocessor 11, password program 12, EEPROM13, randomizer 14, security protection module 15, random access memory ram 16, CPU control module 17 and I/O interface 18, links to each other by data/control/address bus between each module.

Described cryptographic calculation coprocessor 11 is used to move password program 12, carries out required crypto-operations such as data encryption, generally designs with the FPGA circuit arrangement.

Described password program 12 is solidificated among the ROM or writes among the EPROM, generally deposits with the form of ciphertext, and after described encryption veneer powered up, described password program 12 loaded in the described cryptographic calculation coprocessor 11, reruns after decryption restoration goes out expressly.

EEPROM13 is used for safety and preserves master key and the required secure data of other cryptographic calculation, and as the RSA key equity, after described encryption veneer powered up, master key or RSA key were to being called in computing in the cryptographic calculation coprocessor 11 by EEPROM113; Described EEPROM13 can also deposit the registration class information of described encryption veneer as required.

Randomizer 14 is used to provide and generates key and keeper, the required random number of operator's password, generally uses the randomizer isolated plant.

Security protection module 15 is used under special circumstances data erase or the destruction with password program 12 on the described encryption veneer and described EEPROM13, reveals to prevent key and enciphered message.

Random access memory ram 16 is used to store the intermediate data of computing and the buffer area that other data information of veneer is encrypted in conduct.

CPU control module 17 is used to control, monitor, dispatch the normal operation of whole encryption veneer, finishes the inside and outside exchanges data of veneer by I/O interface 18, finishes the loading work of described password program 12 and suitable back work.

I/O interface 18 generally adopts general standard interface, as ISA, PCI etc. as the data and the control channel of encrypting veneer and external system.

Existing function of encrypting veneer can satisfy in the foregoing message transmission requirement to confidentiality, integrality, validity basically, but in practical application area, the controllability of veneer requires to also have not enough, because the restriction of device and technological level, encrypt veneer and lack enough anti-engineering follow-up controls, its consequence is very serious, and the safety of whole information system can't ensure.Make a concrete analysis of the hidden danger that exists below:

1. be subjected to the restriction of device function on the veneer, integrated level and scale, the veneer encryption system must constitute by sub-module, as shown in Figure 1, the addressing of each intermodule like this, controling and data signal all will be by corresponding bus, and the data/address bus on the plate, control bus and address bus all can have been caused the hidden danger of system safety like this by detecting, intercepting, analysis.

2. the effect of security protection module 15 is limited; because each module is separate on the plate; therefore can adopt physical measure to cut off security protection module 15, the assailant can be analyzed the function of all the other modules smoothly, and needn't worry lossing of relevant information.

3. because the restriction of domestic integrated circuit (IC) design and production technology, cryptographic calculation coprocessor 11 major parts all are to realize with the FPGA circuit, the assailant is easy to its structure is cracked, and analyzes the circuit structure of enciphering and deciphering algorithm, and then cracks the password program 12 that is solidificated among the ROM.

4. the generation of key and key management occupy extremely important status in encryption mechanism, all cryptographic algorithm all are to carry out round key, the leakage of key will cause the collapse of whole encryption system, consequence is extremely serious, particularly in the commercial cipher field, because its most cryptographic algorithm all is disclosed, therefore, key is cracked and will brings enormous economic loss.Encrypt EEPROM13 on the veneer and mainly be used for storage key, though considered the safety management of key, because foregoing potential safety hazard, the assailant can read content among the EEPROM13 by all means, thereby obtain key, crack encryption system.

5. CPU control module 17 on the veneer and corresponding operating system all may exist " BUG " or manufacturer, supplier to leave the back door, in case utilized by the malice effractor, just might crack whole encryption system, cause tremendous loss.

Therefore, the object of the present invention is to provide a kind of new encryption device, can solve above-mentioned security hidden trouble effectively, improve controllability, device of the present invention will promote the anti-engineering follow-up control of encryption system and the security protection intensity of system greatly.

For achieving the above object, the present invention uses the notion of SOC (system on a chip), adopts the method for the system integration, and the encryption device that is adapted to multiple cryptographic algorithm is provided.

Encryption device of the present invention comprises programmable I/O interface, check and store device, reset controller, CPU nuclear, cryptographic algorithm accelerator, randomizer, chip ID, security protection unit, shared storage module, encryption and decryption subroutine storage; Except that reset controller, other modules all link to each other by data/address bus each other, and described encryption device is by finishing the exchange of data, instruction, address between programmable I/O interface and the external system.

Below in conjunction with accompanying drawing, further describe the present invention.

Fig. 1 is the structural representation of existing encryption veneer.

Fig. 2 is the structural representation of encryption device of the present invention.

In front Fig. 1 is described in detail, repeats no more here.

In structure chart shown in Figure 2, dashed line is divided into two zones with the inside of encryption device, and line comprises programmable I/O interface 201, check and store device 202 and reset controller 203 with the lower part; Described programmable I/O interface 201 is used to finish the exchange of data, instruction, address between described encryption device and the external system; Described check and store device 202 is used to prevent that message from being distorted with message misinformates, it is the verification mode of taking for the degree of protection that strengthens information integrity, be similar to general check code, but its computation rule is underground, and is difficult for from general verification rule, deriving; Described reset controller 203 is used for resetting and the internal information removing work of external control device under special circumstances of device, and its response rank is the highest.The following part of dashed line has formed the partition of the inside and outside system of described encryption device.

The above part of dashed line comprises CPU nuclear 204, cryptographic algorithm accelerator 205, randomizer 206, chip ID 207, security protection unit 208, shared storage module 209 and encryption and decryption subroutine storage 210; each module all hangs on the internal data bus; having formed with CPU nuclear 204 is the encryption device trunk at center with cryptographic algorithm accelerator 205, and CPU nuclear 204 is Dispatch and Command Center of whole encryption device.

CPU nuclear 204 adopts the CPU nuclear technology, can be according to the demand of oneself, improve its command system by the method that increases peripheral specific auxiliary circuit, for described encryption device is prepared special-purpose instruction set, these instruction set all are in the hierarchical security state, respectively by responsible departments of the government, application system keeper's control; CPU nuclear 204 can adopt 16,32,64 etc.

Cryptographic algorithm accelerator 205 is similar to the cryptographic calculation coprocessor of encrypting in the integrated circuit board 11, but it all adopts hardware configuration to realize corresponding cryptographic algorithm, and function is better than cryptographic calculation coprocessor 11 greatly.The cryptographic algorithm accelerator 205 inner modular constructions that adopt, finish the encryption and decryption computing of multiple cryptographic algorithm, the cryptographic algorithm of its support has: public key algorithm is that RSA Algorithm, the mould length of 512,768,1024,2048,4096 bits is the DSA Digital Signature Algorithm of 512,1024 bits and elliptic curve cryptography etc. as mould length; Symmetry algorithm is as symmetric key cipher algorithms such as DES algorithm, Triple-DES algorithm, RC2 algorithm, RC4 algorithm and IDEA; The HASH algorithm is as MD2 algorithm, MD5 algorithm and SHA1 algorithm.

Randomizer 206 is used for the generation of random number, and the array at random that randomizer 206 generates produces required random number, key or key equity data after examining 204 inter-process through CPU.

CHIP ID207 is the controllability for stiffening device, and what be provided with in device can only wherein deposit unique device id number by the zone of responsible departments of the government's read/write, for the supervision of authorities is provided convenience.

The instruction of the Compulsory Removal signal of security protection unit 208 executive system reset controllers 203; also can be according to the detection component of self and the alarm command of CPU nuclear 204; start the emergent clock system that carries, finish system's self-destruction in the time of Millisecond, the information of safeguards system is not revealed.Security protection unit 208 has than the stronger function in similar unit in the veneer encryption system owing to be to be integrated in internal system, and is more reliable to the protection of system information.

Shared storage module 209 is made up of RAM, EEPROM, be divided into the block structure that varies in size, be defined as read-write of instruction, general read-write, read-only, prohibit and read piece etc. according to purposes respectively, be used for depositing master key, private key, intermediate data etc., and be used for CPU nuclear 204, cryptographic algorithm accelerator 205 and carrying out intermediate object program when handling of internal arithmetic and encryption and decryption, the purposes such as buffer memory of internal data at crypto-operation.

Encryption and decryption subroutine storage 210 is made up of RAM, EEPROM, the encryption and decryption subprogram can be examined 204 instruction according to CPU and download by programmable I/O interface 201, this subprogram can be that what to encrypt also can be non-encrypted, this memory block 210 can be open to external world by the special instruction setting, for user's test.

Externally application system be it seems, encryption device of the present invention is an intelligent interface unit that hangs on the external bus, outer application system can be chosen this encryption device by chip selection signal, and delivers to the character of the data of encryption device interface bus by the end signal combination notice of sheet choosing end, R/W end and other control end.After encryption device powers on, automatically unit such as verification and register 202 are resetted, wait for initialize process; CPU nuclear 204 at first reads in the director data of interface bus, and according to instructing the appointed area to download the required data information of corresponding encryption and decryption program and other enciphering and deciphering algorithm, starting randomizer 206 and generate required random number or key etc., the initial work of other unit of finishing device, encryption device changes wait state over to, prepares the algorithm operating of being correlated with; Device of the present invention cooperates with external system according to relative program and carries out two kinds of built-in functions: the I/O operation of encryption and decryption data, and Status Flag is READY; With inner encryption and decryption arithmetic operation, Status Flag is BUSY, and this two states sign is used to notify outer application system, with the reliability service of assurance device.

The present invention is trunk with CPU nuclear 204 with cryptographic algorithm accelerator 205, abundant risc instruction set and powerful data throughput capabilities, promoted the computing and the control ability of whole device, also provide broad selection leeway for implementing the essential special instruction set of multiple encryption and decryption computing.Data flow is by CPU nuclear 204 and internal data bus scheduling in the device, inner with the outside total data (comprising data, address, instruction) of device exchanges, all undertaken, so effective and external isolation the processing procedure of encryption and decryption by programmable I/O interface 201 by 204 controls of CPU nuclear.Innernal CPU nuclear 204 passes through programmable I/O interface 201 from extraneous reading command, the address, data etc., all show as read-write operation to the I/O interface, and the special instruction that is used for the encryption and decryption arithmetic operation also is private, therefore, malice effractor is with the data character of indigestion and analytical equipment I/O interface, also be difficult to by secret zone the open operation device for addressing that instructs, obtain useful data, these control measure have all promoted the anti-engineering follow-up control of device greatly, satisfy information security field to message transmission and information system confidentiality, integrality, the strict demand of validity and controllability.

In sum, encryption device of the present invention, solved every deficiency that the veneer encryption system exists, and can be integrated on the chip of veneer, volume dwindles greatly, has satisfied in the information safety system requirement to confidentiality, integrality, validity and the controllability of message transmission better.

Claims

1. new encryption device, it is characterized in that: comprise the programmable I/O interface (201), check and store device (202), reset controller (203), CPU nuclear (204), cryptographic algorithm accelerator (205), randomizer (206), chip ID (207), security protection unit (208), shared storage module (209), encryption and decryption subroutine storage (210) that link to each other by data/address bus, also comprise reset controller (203);

Described encryption device is by finishing the exchange of data, instruction, address between programmable I/O interface (201) and the external system;

Described programmable I/O interface (201) is used for the exchange of data, instruction, address between described encryption device and the external system;

Described check and store device (202) is used to prevent that message from being distorted with message misinformates;

Described reset controller (203) is used for resetting and the internal information removing work of external control device under special circumstances of device;

Described CPU nuclear (204) improves its command system by the method that increases peripheral specific auxiliary circuit, for described encryption device is prepared special-purpose instruction set;

Described cryptographic algorithm accelerator (205) is used to finish the encryption and decryption computing of multiple cryptographic algorithm;

Described randomizer (206) is used for the generation of random number;

Described chip ID (207) is used to deposit unique device id number;

Described security protection unit (208) is carried out the Compulsory Removal signal instruction from described reset controller (203), according to the detection component of self and the alarm command of described CPU nuclear (204), starts the emergent clock system that carries, and finishes system's self-destruction.

2. encryption device as claimed in claim 1, it is characterized in that: described shared storage module (209) is made up of RAM, EEPROM, be divided into read-write, read-only of varying in size, prohibit block structures such as reading piece and be defined as read-write of instruction, be used for depositing master key, private key, intermediate data etc. at crypto-operation, and the buffer memory of intermediate object program, internal data.

3. encryption device as claimed in claim 1 is characterized in that: described encryption and decryption subroutine storage (210) is made up of RAM, EEPROM, can storage encryption or unencrypted subprogram.

4. encryption device as claimed in claim 1 is characterized in that: described CPU nuclear (204) can adopt 16,32,64.