CA2536532A1 - Method and apparatus of integrating link layer security into a physical layer transceiver - Google Patents

Method and apparatus of integrating link layer security into a physical layer transceiver Download PDF

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Publication number
CA2536532A1
CA2536532A1 CA002536532A CA2536532A CA2536532A1 CA 2536532 A1 CA2536532 A1 CA 2536532A1 CA 002536532 A CA002536532 A CA 002536532A CA 2536532 A CA2536532 A CA 2536532A CA 2536532 A1 CA2536532 A1 CA 2536532A1
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CA
Canada
Prior art keywords
phy
data
encrypted data
transmitting
receiving
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002536532A
Other languages
French (fr)
Other versions
CA2536532C (en
Inventor
Daniel C. Biederman
Li-Jau Yang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Cisco Technology Inc
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Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2536532A1 publication Critical patent/CA2536532A1/en
Application granted granted Critical
Publication of CA2536532C publication Critical patent/CA2536532C/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04K—SECRET COMMUNICATION; JAMMING OF COMMUNICATION
    • H04K1/00—Secret communication

Abstract

An apparatus for providing link layer security link layer security in a Physical Layer Transcevier (PHY) is disclosed. In one embodiment, the apparatus may comprise analog circuitry configured to interface with a data transmission medium, digital circuitry configured to interface with a Media Access Controller (MAC); and a crypto engine coupled to the digital circuitry.

Claims (20)

1. An apparatus for providing link layer security in a Physical Layer Transceiver (PHY) comprising:
analog circuitry configured to transmit to, and receive data from, a data transmission medium;
digital circuitry coupled to said analog circuitry, said digital circuitry configured to transmit to, and receive from, a Media Access Controller (MAC); and a crypto engine coupled to said digital circuitry.
2. The apparatus of claim 1, wherein said crypto engine and said PHY are disposed on the same physical chip.
3. The apparatus of claim 2, wherein said crypto engine uses pre-existing hardware on said chip, said hardware pre-existing for the purpose of enabling the function of said PHY.
4. The apparatus of claim 2, wherein said apparatus is a component of a multi-PHY device.
5. The apparatus of claim 2, wherein said PHY communicates using a serial PHY
media interface.
6. The apparatus of claim 3, wherein said pre-existing hardware is chosen from the group consisting of: said PHY's pin functionality, memory map, state machine, signals, signal buses and logic gates.
7. The apparatus of claim 2, wherein said crypto engine is further configured to perform a secondary function.
8. The apparatus of claim 7, wherein said secondary function comprises marking undesired data for dropping.
9. The apparatus of claim 2, wherein said MAC comprises an ASIC further configured as a switching fabric.
10. The apparatus of claim 9, wherein said apparatus is disposed within a router.
11. The apparatus of claim 10, wherein said crypto engine is further configured to manage data packet collisions.
12. A method of providing link layer security between a transmitting PHY and a receiving PHY, said method comprising:
receiving, by the transmitting PHY, data from a first MAC;
encrypting, by said transmitting PHY, said data, producing encrypted data;
transmitting, by said transmitting PHY, said encrypted data to said receiving PHY;
receiving, by said receiving PHY, said encrypted data;
decrypting, by said receiving PHY, said encrypted data; and providing the decrypted data to a second MAC.
13. The method of claim 12, further comprising the acts of:
storing, by said transmitting PHY, said encrypted data;
determining whether a packet collision has occurred; and if a collision has occurred, then re-transmitting said stored encrypted data.
14. A program storage device readable by a machine, tangibly embodying a program of instructions executable by the machine to perform a method, the method comprising:
receiving, by the transmitting PHY, data from a first MAC;
encrypting, by said transmitting PHY, said data, producing encrypted data;
transmitting, by said transmitting PHY, said encrypted data to said receiving PHY;
receiving, by said receiving PHY, said encrypted data;
decrypting, by said receiving PHY, said encrypted data; and providing the decrypted data to a second MAC.
15. The device of claim 14, wherein said method further comprises the acts of:
storing, by said transmitting PHY, said encrypted data;
determining whether a packet collision has occurred; and if a collision has occurred, then re-transmitting said stored encrypted data.
16. An apparatus for providing link layer security in a Physical Layer Transceiver (PHY) comprising:
means for receiving data from a first MAC;
means for encrypting said data, producing encrypted data;
means for transmitting said encrypted data to said receiving PHY;
means for receiving said encrypted data;
means for decrypting said encrypted data; and means for providing the decrypted data to a second MAC.
17. The apparatus of claim 16, further comprising:
means for storing said encrypted data;
means for determining whether a packet collision has occurred; and means for re-transmitting said stored encrypted data.
18. The apparatus of claim 17, wherein said crypto engine means is further configured to perform a secondary function.
19. The apparatus of claim 18, wherein said secondary function comprises data compression.
20. The apparatus of claim 16, wherein said MAC further comprises switching fabric means.
CA2536532A 2003-09-30 2004-09-30 Method and apparatus of integrating link layer security into a physical layer transceiver Expired - Fee Related CA2536532C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/676,390 US7313686B2 (en) 2003-09-30 2003-09-30 Method and apparatus of integrating link layer security into a physical layer transceiver
US10/676,390 2003-09-30
PCT/US2004/032555 WO2005034410A2 (en) 2003-09-30 2004-09-30 Method and apparatus of integrating link layer security into a physical layer transceiver

Publications (2)

Publication Number Publication Date
CA2536532A1 true CA2536532A1 (en) 2005-05-14
CA2536532C CA2536532C (en) 2011-05-31

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CA2536532A Expired - Fee Related CA2536532C (en) 2003-09-30 2004-09-30 Method and apparatus of integrating link layer security into a physical layer transceiver

Country Status (5)

Country Link
US (1) US7313686B2 (en)
EP (1) EP1668807B1 (en)
CN (1) CN1856951B (en)
CA (1) CA2536532C (en)
WO (1) WO2005034410A2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8036202B2 (en) * 2006-07-27 2011-10-11 Cisco Technology, Inc. Physical layer transceiver with integrated time synchronization
US7885296B2 (en) * 2006-07-27 2011-02-08 Cisco Technology, Inc. Maintaining consistency among multiple timestamp counters distributed among multiple devices
US20090080660A1 (en) * 2007-09-20 2009-03-26 Shih Mo Processorless media access control architecture for wireless communication
US8775790B2 (en) * 2007-10-30 2014-07-08 Honeywell International Inc. System and method for providing secure network communications
US9544767B2 (en) * 2014-07-21 2017-01-10 Imagination Technologies Limited Encryption key updates in wireless communication systems

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5689568A (en) * 1995-06-29 1997-11-18 Hughes Electronics Medium access control for a mobile satellite system
US6094439A (en) * 1997-08-15 2000-07-25 Advanced Micro Devices, Inc. Arrangement for transmitting high speed packet data from a media access controller across multiple physical links
US6222852B1 (en) 1997-10-10 2001-04-24 Nortel Networks Limited Method and apparatus for transmitting dual speed ethernet information (10BASE-T and 100BASE-TX) across a physical layer device service interface
US6324288B1 (en) * 1999-05-17 2001-11-27 Intel Corporation Cipher core in a content protection system
US7031267B2 (en) 2000-12-21 2006-04-18 802 Systems Llc PLD-based packet filtering methods with PLD configuration data update of filtering rules
US7317732B2 (en) 2000-09-28 2008-01-08 Teridian Semiconductor, Corp. Method and apparatus for handling link suspend pulse and silent line state transitions of a network device
US6973566B2 (en) * 2001-07-09 2005-12-06 Advanced Micro Devices, Inc. Software modem with privileged mode oversight of control parameters
US7142557B2 (en) * 2001-12-03 2006-11-28 Xilinx, Inc. Programmable logic device for wireless local area network
CA2455010C (en) * 2001-07-25 2009-09-22 Xilinx, Inc. Configurable communication integrated circuit
TW573259B (en) * 2001-12-28 2004-01-21 Admtek Inc LIFM algorithm for security association database lookup in IPSec application
US8230114B2 (en) 2002-08-07 2012-07-24 Broadcom Corporation System and method for implementing a single chip having a multiple sub-layer PHY
US7577129B2 (en) * 2002-10-17 2009-08-18 Broadcom Corporation Supporting multiple logical channels in a physical interface

Also Published As

Publication number Publication date
US20050071629A1 (en) 2005-03-31
WO2005034410A3 (en) 2006-03-30
US7313686B2 (en) 2007-12-25
EP1668807A4 (en) 2012-05-09
CA2536532C (en) 2011-05-31
EP1668807A2 (en) 2006-06-14
CN1856951A (en) 2006-11-01
EP1668807B1 (en) 2017-09-13
CN1856951B (en) 2011-03-23
WO2005034410A2 (en) 2005-04-14

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Effective date: 20181001